> On Nov 15, 2019, at 4:22 PM, David Bridgham via cctalk
> <cctalk@classiccmp.org> wrote:
>
> ...
> I've also been looking more into microcoding and bitslice designs and it
> could be a really neat little project to build a bitslice processor into
> the FPGA and microcode that to implement MSCP (rather than microcoding
> it to be a PDP-11 and then programming the PDP-11).
I wonder if the UDA50 microcode can be found. That's a bitslice (2901 ALUs
plus 2910 branch controller) which presumably would be pretty easy to emulate
in a small FPGA.
I once saw a bit of the source code. It was very strange because it had two
opcodes per line, one for the ALU and one for the branch controller. Since the
condition codes took a cycle to get to the branch controller, you might see
weird stuff like this (paraphrased, I don't remember the actual opcodes):
CLR R0 ; BNE label
which takes some getting used to if you're a conventional sequential
programmer. Richie Lary of PDP-8 fame did part of that microcode.
paul
