After learning more about the PALM processor in the IBM 5100, it has a similarity to the 6502 in that the first 128 bytes of RAM is a "register file." All its registers (R0 to R15, across 4 interrupt "layers") occupy those first addresses. In addition, they are physically on the processor itself (not in actual RAM). I've been meaning to come up with a sample PALM program that verifies if there is any performance advantage on that (that is, something that "does stuff" with data in addresses 0 to 127, then "does that same stuff" in a higher address like $800+ and see if there is a noticeable performance difference). The earliest document I can find on PALM is from 1972 (or just a few months after the 8080 - the actual initial production date of PALM is unknown, the 1972 date is just when IBM documented the instruction set). But I think the IBM System/3 had a similar design (or at least, just I recall a mention of the System/3 registers are in RAM -- not sure if that's literal or just address-access-wise, but in any case the System/3 was said to be pretty difficult to program for).
Anyhow, to me the PALM may be an earlier "RISC" approach in that its instructions are always 2-bytes (4-bits for a main opcode -- yes only 16 categories, then a few bits for a "modifier" while the middle pair of bits specify a register R0 to R15 that the instruction involves), in contrast to the variable instruction length used by the System/360. There is one exception in PALM where a kind of "long jump" instruction is followed by another 2-bytes that is the target address. You won't hear much about PALM - though I am excited that emulation support for it has recently been added into MAME! I ponder if maybe Chuck Peddle somehow crossed paths with PALM in his early engineering career, or if in some indirect way there was some lineage or connection there (in a "dude, your processor doesn't need to be that complicated, I know a system that in 16 instructions does all sort of stuff" kind of way). BTW, IBM's costs list during the IBM SCAMP development put the PALM processor card costing about $300 (in c. 1973). All that said, in early 1970s, I don't think anyone was yet using the term RISC vs CISC. -Steve v* On Sun, Apr 21, 2024 at 7:50 PM Peter Coghlan via cctalk < [email protected]> wrote: > My first exposure to a computer at home was a BBC Micro with 32kB of RAM > and > 32kB of ROM. Included in this was a 16kB BASIC ROM which was regarded as > fast > and powerful, featuring 32 bit integer variables, 40 bit floating point > variables, variable length strings, structured programming constructs and > everything accessed by keyword statements rather than PEEK this and POKE > that. > > This was implemented by a humble 6502 running at (mostly) 2MHz, with one 8 > bit > arithmetic register, two 8 bit index registers, one 8 bit stack pointer, > a 16 bit program counter and a few flag bits. > > I would have expected that a computers featuring a Z80 with its larger > register > set, 16 bit arithmetic operations, richer instruction set and general bells > and whistles would have been able to produce a much superior > implementation in > terms of speed or features or both but I never came across one. > > Why is that? Did the Z80 take more cycles to implement it's more complex > instructions? Is this an early example of RISC vs CISC? > > Regards, > Peter Coghlan > >
