> On Jul 5, 2025, at 5:55 PM, ben via cctalk <cctalk@classiccmp.org> wrote:
>
> On 2025-07-05 1:34 p.m., Paul Koning via cctalk wrote:
>>> On Jul 5, 2025, at 11:05 AM, Jon Elson via cctalk <cctalk@classiccmp.org>
>>> wrote:
>>>
>>> On 7/4/25 14:32, Mark Kahrs via cctalk wrote:
>>>> Jon Elson's take hits home. A 780 was delivered and VMS was running. We
>>>> installed 4.1BSD and it ran fine until it crashed. Field service insisted
>>>> we needed a full set of RS-232 wires in our cable. Still crashed
>>>> (surprise!). Switched to VMS, still crashed after a while. Local field
>>>> service couldn't find it. The big guns flew in from Maynard. First day:
>>>> Couldn't find it. Second day: "What, what's that wire doing there? Have a
>>>> wire-wrap tool?". Removed wire from backplane. Boots, runs. Engineer
>>>> flies home.
>>>
>>> Holy cow, HOW did he find it!!?? The KA780 backplane was a HUGE mass of
>>> wires!
>>>
>>> Jon
>> If you understand the machine well enough and trace the broken data path
>> around the machine, you can get there without too much trouble. That
>> assumes the issue is reasonably repeatable. If it only messes up once a day
>> or so, it's harder, or at least more time consuming.
>> Compared to CDC 6000 mainframes, the 780 (and other DEC computers) are
>> marvels of simplicity. Consider the 6600: 15 chassis each with 750-ish
>> module slots, each with 28 signal pins. A bunch of slots were filled
>> instead by memory modules (5 slots wide), but still you're looking at maybe
>> 5000 wires (or rather, twisted pairs) per chassis, plus 30 or so cable
>> assemblies each with 19 coax inside, to run signals from one chassis to
>> another (or to I/O devices). I assume those were all done by hand; it's not
>> obvious how a robot could do that in the early 1960s, unlike wire wrap
>> backplanes.
>
> And all the wires tuned to have the same delay I bet.
>
>> paul
> Ben.
>
At Celerity Computing (later called Sun Supercomputing, long story) we started
by making small dishwasher sized deskside workstations.
We were using an NCR RISC chip as our CPU, getting about 2 MIPS with a custom
FPU hand crafted from the most interesting parts.
We wire-wrapped the first few boards and backplanes during R&D before we went
to production. We switched to a proper 6 layer PCB for the backplane.
The backplane had 3 traces that had long curved lines in them to get the delay
right.
David
Without others thinking you are good, it doesn't matter how good you think you
are.
David Barto
ba...@kdbarto.org
