Christian Corti wrote: > On Wed, 30 Sep 2026, Mark Kahrs wrote: > > Minor point: The Burroughs B6500/6700 has 51 bits > > because it had 3 bits of > > tag on each word. But the underlying CPU was 48 bits. > It would be interesting to know if the memory layout with 48 bits plus > tag/parity bits was inspired from the TR 4. > Christian
Almost certainly not. The B6500/6700 was the successor to the Burroughs B5500, which had a word consisting of 48 bits plus parity. 48 bits was not an uncommon word size in the early '60s, e.g., Atlas, CDC 1604, Datamatic 1000, KDF9, Honeywell 800, as it allowed 8 six-bit characters per word. The B5500 distinguished data words from control words by means of the high-order bit in the word, known as the "flag bit." Alas, embedding the flag bit within the 48 bits turned out to be a lousy idea for character manipulation, and the machine ended up with an entirely separate mode of operation to handle character strings, which ignored the flag bit. In designing the B6500, a big priority was to do something about the flag bit, and the obvious thing was to move it outside the 48-bit data word. But there were other bits in the B5500 control words that indicated the type of control word, so those bits were combined with the flag bit in a three-bit external tag field. Modern successors to the B6500/6700 have four tag bits. The idea of using an external tag field was probably also influenced by two predecessors to the B5000/5500, the ElectroData/Burroughs 205 (1954) and Burroughs 220 (1957). Those were decimal machines with an 11 BCD-digit word. The arithmetic sign was in the low-order bit of the high-order digit, but other bits were used during I/O for control functions. You could actually embed instructions as they were read from the I/O data stream and do things like address relocation on the words that a followed. Thus, that high-order digit acted somewhat like a tag.
