https://github.com/Ami-zhang updated https://github.com/llvm/llvm-project/pull/146481
>From 055093abe261ad02a7225554a861c80b3149c286 Mon Sep 17 00:00:00 2001 From: Ami-zhang <[email protected]> Date: Tue, 1 Jul 2025 15:16:58 +0800 Subject: [PATCH] [docs] Add clang release notes for LoongArch --- clang/docs/ReleaseNotes.rst | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index e6c8f9df22170..43acc50f04468 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -651,7 +651,7 @@ Improvements to Clang's diagnostics - Delayed typo correction was removed from the compiler; immediate typo correction behavior remains the same. Delayed typo correction facilities were fragile and unmaintained, and the removal closed the following issues: - #GH142457, #GH139913, #GH138850, #GH137867, #GH137860, #GH107840, #GH93308, +#GH142457, #GH139913, #GH138850, #GH137867, #GH137860, #GH107840, #GH93308, #GH69470, #GH59391, #GH58172, #GH46215, #GH45915, #GH45891, #GH44490, #GH36703, #GH32903, #GH23312, #GH69874. @@ -985,6 +985,36 @@ Windows Support LoongArch Support ^^^^^^^^^^^^^^^^^ +- Add support for OHOS on loongarch64. + +- Add inline asm support for the `q` constraint. + +- Add `same-address` constraint to the description of `-m[no]ld-seq-sa`. + +- Add target attribute support for function. Supported formats include: + * `arch=<arch>` strings, that specify the architecture features for a + function as per the `-march=<arch>` option. + * `tune=<cpu>` strings, that specify the tune-cpu cpu for a function as + per `-mtune`. + * `<feature>`/`no-<feature>` enables/disables the specific feature. + +- Only report the first range error if there is actually more than one for + `__builtin_loongarch_cacop_[wd]`. + +- Add support for the `_Float16` type. And fix incorrect ABI lowering of `_Float16` + in the case of structs containing fp16 that are eligible for passing via `GPR+FPR` + or `FPR+FPR`. Also fix `int16` -> `__fp16` conversion code gen, which uses generic LLVM + IR rather than `llvm.convert.to.fp16` intrinsics. + +- Add support for the `__bf16` type. + +- Fix `-mno-lsx` option not disabling LASX feature. When `-march` with LASX feature and + `-mno-lsx` options are used together, `-mno-lsx` fails to disable LASX, leaving + `HasFeatureLASX=true` and causing incorrect `__loongarch_sx/asx=1` macro definition. + +- Fix incorrect _BitInt(N>64) alignment. Now consistently uses 16-byte alignment for all + `_BitInt(N)` where N > 64. + RISC-V Support ^^^^^^^^^^^^^^ _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
