shiltian wrote:
For some reason there is a crash in
`llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll`.
```
LLVM ERROR: Cannot select: t28: ch = store<(store (s16) into %ir.out.load,
addrspace 1)> t0, t27, t30, undef:i64
t27: i16 = bitcast t21
t21: bf16 = llvm.amdgcn.tanh TargetConstant:i64<3419>, t19
t19: bf16 = bitcast t18
t18: i16 = truncate t17
t17: i32,ch = load<(dereferenceable invariant load (s32) from
%ir.src.kernarg.offset.align.down, align 8, addrspace 4)> t0, t41, undef:i64
t41: i64 = bitcast t40
t40: v2i32 = BUILD_VECTOR t39, t37
t39: i32 = or t36, Constant:i32<8>
t36: i32 = extract_vector_elt t33, Constant:i32<0>
t37: i32 = extract_vector_elt t33, Constant:i32<1>
t33: v2i32 = bitcast t14
t30: i64 = bitcast t29
t29: v2i32,ch = load<(dereferenceable invariant load (s64) from
%ir.out.kernarg.offset1, align 16, addrspace 4)> t0, t14, undef:i64
t14: i64 = AssertAlign<16> t32
t32: i64,ch = CopyFromReg t0, Register:i64 %3
In function: tanh_bf16
```
Not sure why the store to `s16` can't be selected. Need to figure out more.
https://github.com/llvm/llvm-project/pull/147425
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