https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/155710
>From 41c79fa197820c96637f03c8c2f9cdcaeb3ff5cc Mon Sep 17 00:00:00 2001 From: Craig Topper <[email protected]> Date: Wed, 27 Aug 2025 15:36:08 -0700 Subject: [PATCH] [RISCV] Verify vfwmaccbf16 and vfncvtbf16 FRM argument in SemaRISCV::CheckBuiltinFunctionCall. We need to check that the FRM value is an integer constant expression with value 0-4. --- clang/lib/Sema/SemaRISCV.cpp | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/clang/lib/Sema/SemaRISCV.cpp b/clang/lib/Sema/SemaRISCV.cpp index 7b16d080603bf..3ba93ff98898b 100644 --- a/clang/lib/Sema/SemaRISCV.cpp +++ b/clang/lib/Sema/SemaRISCV.cpp @@ -1000,6 +1000,7 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfncvt_f_x_w_rm: case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm: case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm: + case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm: return SemaRef.BuiltinConstantArgRange(TheCall, 1, 0, 4); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm: @@ -1038,6 +1039,7 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfncvt_f_x_w_rm_tu: case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_tu: case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_tu: + case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_tu: case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_m: case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_m: case RISCVVector::BI__builtin_rvv_vfcvt_x_f_v_rm_m: @@ -1051,6 +1053,7 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfncvt_f_x_w_rm_m: case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_m: case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_m: + case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_m: return SemaRef.BuiltinConstantArgRange(TheCall, 2, 0, 4); case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tu: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tu: @@ -1100,6 +1103,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwmsac_vf_rm: case RISCVVector::BI__builtin_rvv_vfwnmsac_vv_rm: case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm: case RISCVVector::BI__builtin_rvv_vfmacc_vv_rm_tu: case RISCVVector::BI__builtin_rvv_vfmacc_vf_rm_tu: case RISCVVector::BI__builtin_rvv_vfnmacc_vv_rm_tu: @@ -1124,6 +1129,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwmsac_vf_rm_tu: case RISCVVector::BI__builtin_rvv_vfwnmsac_vv_rm_tu: case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm_tu: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm_tu: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm_tu: case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_m: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_m: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_m: @@ -1161,6 +1168,7 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfncvt_f_x_w_rm_tum: case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_tum: case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_tum: + case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_tum: case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_tumu: case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_tumu: case RISCVVector::BI__builtin_rvv_vfcvt_x_f_v_rm_tumu: @@ -1174,6 +1182,7 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfncvt_f_x_w_rm_tumu: case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_tumu: case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_tumu: case RISCVVector::BI__builtin_rvv_vfsqrt_v_rm_mu: case RISCVVector::BI__builtin_rvv_vfrec7_v_rm_mu: case RISCVVector::BI__builtin_rvv_vfcvt_x_f_v_rm_mu: @@ -1187,6 +1196,7 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfncvt_f_x_w_rm_mu: case RISCVVector::BI__builtin_rvv_vfncvt_f_xu_w_rm_mu: case RISCVVector::BI__builtin_rvv_vfncvt_f_f_w_rm_mu: + case RISCVVector::BI__builtin_rvv_vfncvtbf16_f_f_w_rm_mu: return SemaRef.BuiltinConstantArgRange(TheCall, 3, 0, 4); case RISCVVector::BI__builtin_rvv_vfmacc_vv_rm_m: case RISCVVector::BI__builtin_rvv_vfmacc_vf_rm_m: @@ -1212,6 +1222,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwmsac_vf_rm_m: case RISCVVector::BI__builtin_rvv_vfwnmsac_vv_rm_m: case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm_m: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm_m: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm_m: case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_tum: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_tum: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_tum: @@ -1256,6 +1268,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwmsac_vf_rm_tum: case RISCVVector::BI__builtin_rvv_vfwnmsac_vv_rm_tum: case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm_tum: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm_tum: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm_tum: case RISCVVector::BI__builtin_rvv_vfredosum_vs_rm_tum: case RISCVVector::BI__builtin_rvv_vfredusum_vs_rm_tum: case RISCVVector::BI__builtin_rvv_vfwredosum_vs_rm_tum: @@ -1304,6 +1318,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwmsac_vf_rm_tumu: case RISCVVector::BI__builtin_rvv_vfwnmsac_vv_rm_tumu: case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm_tumu: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm_tumu: case RISCVVector::BI__builtin_rvv_vfadd_vv_rm_mu: case RISCVVector::BI__builtin_rvv_vfadd_vf_rm_mu: case RISCVVector::BI__builtin_rvv_vfsub_vv_rm_mu: @@ -1348,6 +1364,8 @@ bool SemaRISCV::CheckBuiltinFunctionCall(const TargetInfo &TI, case RISCVVector::BI__builtin_rvv_vfwmsac_vf_rm_mu: case RISCVVector::BI__builtin_rvv_vfwnmsac_vv_rm_mu: case RISCVVector::BI__builtin_rvv_vfwnmsac_vf_rm_mu: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vv_rm_mu: + case RISCVVector::BI__builtin_rvv_vfwmaccbf16_vf_rm_mu: return SemaRef.BuiltinConstantArgRange(TheCall, 4, 0, 4); case RISCV::BI__builtin_riscv_ntl_load: case RISCV::BI__builtin_riscv_ntl_store: _______________________________________________ cfe-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
