https://github.com/RKSimon created 
https://github.com/llvm/llvm-project/pull/156001

Minor cleanup to help when I begin splitting off constexpr capable builtins

>From f5aba19b49212054126baba83fad5d4077c4a164 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <[email protected]>
Date: Fri, 29 Aug 2025 10:58:58 +0100
Subject: [PATCH] [X86] Merge matching AVX512 rotate Features/Attributes
 blocks. NFC.

Minor cleanup to help when I begin splitting off constexpr capable builtins
---
 clang/include/clang/Basic/BuiltinsX86.td | 33 +++++-------------------
 1 file changed, 6 insertions(+), 27 deletions(-)

diff --git a/clang/include/clang/Basic/BuiltinsX86.td 
b/clang/include/clang/Basic/BuiltinsX86.td
index 0bc93d75c9724..b39fba425e929 100644
--- a/clang/include/clang/Basic/BuiltinsX86.td
+++ b/clang/include/clang/Basic/BuiltinsX86.td
@@ -2051,43 +2051,22 @@ let Features = "avx512dq,evex512", Attributes = 
[NoThrow, Const, RequiredVectorW
 
 let Features = "avx512f,evex512", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>] in {
   def prold512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Constant 
int)">;
-  def prolq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Constant int)">;
-}
-
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
-  def prold128 : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Constant int)">;
-}
-
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
-  def prold256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Constant int)">;
-}
-
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
-  def prolq128 : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long 
int>, _Constant int)">;
-}
-
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
-  def prolq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long 
int>, _Constant int)">;
-}
-
-let Features = "avx512f,evex512", Attributes = [NoThrow, Const, 
RequiredVectorWidth<512>] in {
   def prord512 : X86Builtin<"_Vector<16, int>(_Vector<16, int>, _Constant 
int)">;
+  def prolq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Constant int)">;
   def prorq512 : X86Builtin<"_Vector<8, long long int>(_Vector<8, long long 
int>, _Constant int)">;
 }
 
 let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+  def prold128 : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Constant int)">;
   def prord128 : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Constant int)">;
-}
-
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
-  def prord256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Constant int)">;
-}
-
-let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<128>] in {
+  def prolq128 : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long 
int>, _Constant int)">;
   def prorq128 : X86Builtin<"_Vector<2, long long int>(_Vector<2, long long 
int>, _Constant int)">;
 }
 
 let Features = "avx512vl", Attributes = [NoThrow, Const, 
RequiredVectorWidth<256>] in {
+  def prold256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Constant int)">;
+  def prord256 : X86Builtin<"_Vector<8, int>(_Vector<8, int>, _Constant int)">;
+  def prolq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long 
int>, _Constant int)">;
   def prorq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long 
int>, _Constant int)">;
 }
 

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