https://github.com/GeneraluseAI updated 
https://github.com/llvm/llvm-project/pull/169985

>From 7308ac1247cf6c243880a6d4f23d0517da15d774 Mon Sep 17 00:00:00 2001
From: generaluseai <[email protected]>
Date: Sat, 29 Nov 2025 18:16:55 +0800
Subject: [PATCH] [CIR][X86] Implement lowering for AVX512 ktest builtins
 (kortestc, kortestz)

This patch adds CIR codegen support for the AVX512 mask test builtins on
X86, including kortestc and kortestz across all supported mask widths
(qi, hi, si, di). Each builtin is lowered to the expected vector<i1>
mask logic and scalar comparison form in CIR, consistent with the
semantics of the corresponding LLVM implementations.

Because ClangIR does not yet provide a dedicated `zext` operation,
the lowering emulates zero-extension by first converting the boolean
result through `bool_to_int` and then performing an integer cast to the
final result type. This reproduces the `icmp` + `zext` pattern used in
LLVM IR and maintains semantic equivalence.
---
 clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp    |  34 ++++-
 .../CodeGenBuiltins/X86/avx512bw-builtins.c   | 124 ++++++++++++++++++
 .../CodeGenBuiltins/X86/avx512dq-builtins.c   |  65 +++++++++
 .../CodeGenBuiltins/X86/avx512f-builtins.c    |  56 ++++++++
 4 files changed, 273 insertions(+), 6 deletions(-)

diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp 
b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
index b242efc00e491..1b6dd54d32646 100644
--- a/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+++ b/clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
@@ -757,14 +757,40 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned 
builtinID,
   case X86::BI__builtin_ia32_vpcomuw:
   case X86::BI__builtin_ia32_vpcomud:
   case X86::BI__builtin_ia32_vpcomuq:
+    cgm.errorNYI(expr->getSourceRange(),
+                 std::string("unimplemented X86 builtin call: ") +
+                     getContext().BuiltinInfo.getName(builtinID));
+    return {};
   case X86::BI__builtin_ia32_kortestcqi:
   case X86::BI__builtin_ia32_kortestchi:
   case X86::BI__builtin_ia32_kortestcsi:
-  case X86::BI__builtin_ia32_kortestcdi:
+  case X86::BI__builtin_ia32_kortestcdi: {
+    mlir::Location loc = getLoc(expr->getExprLoc());
+    cir::IntType ty = cast<cir::IntType>(ops[0].getType());
+    cir::IntAttr allOnesAttr =
+        cir::IntAttr::get(ty, APInt::getAllOnes(ty.getWidth()));
+    cir::ConstantOp allOnesOp = builder.getConstant(loc, allOnesAttr);
+    mlir::Value orOp = emitX86MaskLogic(builder, loc, cir::BinOpKind::Or, ops);
+    mlir::Value cmp =
+        cir::CmpOp::create(builder, loc, cir::CmpOpKind::eq, orOp, allOnesOp);
+    return builder.createCast(cir::CastKind::bool_to_int, cmp,
+                              cgm.convertType(expr->getType()));
+  }
   case X86::BI__builtin_ia32_kortestzqi:
   case X86::BI__builtin_ia32_kortestzhi:
   case X86::BI__builtin_ia32_kortestzsi:
-  case X86::BI__builtin_ia32_kortestzdi:
+  case X86::BI__builtin_ia32_kortestzdi: {
+    mlir::Location loc = getLoc(expr->getExprLoc());
+    cir::IntType ty = cast<cir::IntType>(ops[0].getType());
+    cir::IntAttr allZerosAttr =
+        cir::IntAttr::get(ty, APInt::getZero(ty.getWidth()));
+    cir::ConstantOp allZerosOp = builder.getConstant(loc, allZerosAttr);
+    mlir::Value orOp = emitX86MaskLogic(builder, loc, cir::BinOpKind::Or, ops);
+    mlir::Value cmp =
+        cir::CmpOp::create(builder, loc, cir::CmpOpKind::eq, orOp, allZerosOp);
+    return builder.createCast(cir::CastKind::bool_to_int, cmp,
+                              cgm.convertType(expr->getType()));
+  }
   case X86::BI__builtin_ia32_ktestcqi:
   case X86::BI__builtin_ia32_ktestzqi:
   case X86::BI__builtin_ia32_ktestchi:
@@ -773,10 +799,6 @@ mlir::Value CIRGenFunction::emitX86BuiltinExpr(unsigned 
builtinID,
   case X86::BI__builtin_ia32_ktestzsi:
   case X86::BI__builtin_ia32_ktestcdi:
   case X86::BI__builtin_ia32_ktestzdi:
-    cgm.errorNYI(expr->getSourceRange(),
-                 std::string("unimplemented X86 builtin call: ") +
-                     getContext().BuiltinInfo.getName(builtinID));
-    return {};
   case X86::BI__builtin_ia32_kaddqi:
     return emitX86MaskAddLogic(builder, getLoc(expr->getExprLoc()),
                                "x86.avx512.kadd.b", ops);
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c 
b/clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
index 4863ba0bd8848..9f0ca5874c589 100644
--- a/clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
+++ b/clang/test/CIR/CodeGenBuiltins/X86/avx512bw-builtins.c
@@ -465,3 +465,127 @@ __mmask64 test_kmov_q(__mmask64 A) {
 
   return __builtin_ia32_kmovq(A);
 }
+
+unsigned char test_kortestc_mask32_u8(__mmask32 __A, __mmask32 __B) {
+  // CIR-LABEL: _kortestc_mask32_u8
+  // CIR: [[ALL_ONES:%.*]] = cir.const #cir.int<4294967295> : !u32i
+  // CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x 
!cir.int<u, 1>>
+  // CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x 
!cir.int<u, 1>>
+  // CIR: [[OR:%.*]]  = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<32 x 
!cir.int<u, 1>>
+  // CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<32 x 
!cir.int<u, 1>> -> !u32i
+  // CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ALL_ONES]]) : !u32i, 
!cir.bool
+  // CIR: [[B2I:%.*]] = cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+  // CIR: cir.cast integral [[B2I]] : !s32i -> !u8i
+
+  // LLVM-LABEL: _kortestc_mask32_u8
+  // LLVM: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+  // LLVM: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+  // LLVM: [[OR:%.*]]  = or <32 x i1> [[LHS]], [[RHS]]
+  // LLVM: [[CAST:%.*]] = bitcast <32 x i1> [[OR]] to i32
+  // LLVM: [[CMP:%.*]] = icmp eq i32 [[CAST]], -1
+  // LLVM: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+  // LLVM: trunc i32 [[ZEXT]] to i8
+
+  // OGCG-LABEL: _kortestc_mask32_u8
+  // OGCG: bitcast i32 %{{.*}} to <32 x i1>
+  // OGCG: bitcast i32 %{{.*}} to <32 x i1>
+  // OGCG: or <32 x i1> {{.*}}, {{.*}}
+  // OGCG: bitcast <32 x i1> {{.*}} to i32
+  // OGCG: icmp eq i32 {{.*}}, -1
+  // OGCG: zext i1 {{.*}} to i32
+  // OGCG: trunc i32 {{.*}} to i8
+  return _kortestc_mask32_u8(__A, __B);
+}
+
+unsigned char test_kortestc_mask64_u8(__mmask64 __A, __mmask64 __B) {
+  // CIR-LABEL: _kortestc_mask64_u8
+  // CIR: [[ALL_ONES:%.*]] = cir.const #cir.int<18446744073709551615> : !u64i
+  // CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x 
!cir.int<u, 1>>
+  // CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x 
!cir.int<u, 1>>
+  // CIR: [[OR:%.*]]  = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<64 x 
!cir.int<u, 1>>
+  // CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<64 x 
!cir.int<u, 1>> -> !u64i
+  // CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ALL_ONES]]) : !u64i, 
!cir.bool
+  // CIR: [[B2I:%.*]] = cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+  // CIR: cir.cast integral [[B2I]] : !s32i -> !u8i
+
+  // LLVM-LABEL: _kortestc_mask64_u8
+  // LLVM: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+  // LLVM: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+  // LLVM: [[OR:%.*]]  = or <64 x i1> [[LHS]], [[RHS]]
+  // LLVM: [[CAST:%.*]] = bitcast <64 x i1> [[OR]] to i64
+  // LLVM: [[CMP:%.*]] = icmp eq i64 [[CAST]], -1
+  // LLVM: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+  // LLVM: trunc i32 [[ZEXT]] to i8
+
+  // OGCG-LABEL: _kortestc_mask64_u8
+  // OGCG: bitcast i64 %{{.*}} to <64 x i1>
+  // OGCG: bitcast i64 %{{.*}} to <64 x i1>
+  // OGCG: or <64 x i1> {{.*}}, {{.*}}
+  // OGCG: bitcast <64 x i1> {{.*}} to i64
+  // OGCG: icmp eq i64 {{.*}}, -1
+  // OGCG: zext i1 {{.*}} to i32
+  // OGCG: trunc i32 {{.*}} to i8
+  return _kortestc_mask64_u8(__A, __B);
+}
+
+unsigned char test_kortestz_mask32_u8(__mmask32 __A, __mmask32 __B) {
+  // CIR-LABEL: _kortestz_mask32_u8
+  // CIR: [[ZERO:%.*]] = cir.const #cir.int<0> : !u32i
+  // CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x 
!cir.int<u, 1>>
+  // CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u32i -> !cir.vector<32 x 
!cir.int<u, 1>>
+  // CIR: [[OR:%.*]]  = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<32 x 
!cir.int<u, 1>>
+  // CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<32 x 
!cir.int<u, 1>> -> !u32i
+  // CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ZERO]]) : !u32i, !cir.bool
+  // CIR: [[B2I:%.*]] = cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+  // CIR: cir.cast integral [[B2I]] : !s32i -> !u8i
+
+  // LLVM-LABEL: _kortestz_mask32_u8
+  // LLVM: [[LHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+  // LLVM: [[RHS:%.*]] = bitcast i32 %{{.*}} to <32 x i1>
+  // LLVM: [[OR:%.*]]  = or <32 x i1> [[LHS]], [[RHS]]
+  // LLVM: [[CAST:%.*]] = bitcast <32 x i1> [[OR]] to i32
+  // LLVM: [[CMP:%.*]] = icmp eq i32 [[CAST]], 0
+  // LLVM: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+  // LLVM: trunc i32 [[ZEXT]] to i8
+
+  // OGCG-LABEL: _kortestz_mask32_u8
+  // OGCG: bitcast i32 %{{.*}} to <32 x i1>
+  // OGCG: bitcast i32 %{{.*}} to <32 x i1>
+  // OGCG: or <32 x i1> {{.*}}, {{.*}}
+  // OGCG: bitcast <32 x i1> {{.*}} to i32
+  // OGCG: icmp eq i32 {{.*}}, 0
+  // OGCG: zext i1 {{.*}} to i32
+  // OGCG: trunc i32 {{.*}} to i8
+  return _kortestz_mask32_u8(__A, __B);
+}
+
+unsigned char test_kortestz_mask64_u8(__mmask64 __A, __mmask64 __B) {
+  // CIR-LABEL: _kortestz_mask64_u8
+  // CIR: [[ZERO:%.*]] = cir.const #cir.int<0> : !u64i
+  // CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x 
!cir.int<u, 1>>
+  // CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u64i -> !cir.vector<64 x 
!cir.int<u, 1>>
+  // CIR: [[OR:%.*]]  = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<64 x 
!cir.int<u, 1>>
+  // CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<64 x 
!cir.int<u, 1>> -> !u64i
+  // CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ZERO]]) : !u64i, !cir.bool
+  // CIR: [[B2I:%.*]] = cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+  // CIR: cir.cast integral [[B2I]] : !s32i -> !u8i
+
+  // LLVM-LABEL: _kortestz_mask64_u8
+  // LLVM: [[LHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+  // LLVM: [[RHS:%.*]] = bitcast i64 %{{.*}} to <64 x i1>
+  // LLVM: [[OR:%.*]]  = or <64 x i1> [[LHS]], [[RHS]]
+  // LLVM: [[CAST:%.*]] = bitcast <64 x i1> [[OR]] to i64
+  // LLVM: [[CMP:%.*]] = icmp eq i64 [[CAST]], 0
+  // LLVM: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+  // LLVM: trunc i32 [[ZEXT]] to i8
+
+  // OGCG-LABEL: _kortestz_mask64_u8
+  // OGCG: bitcast i64 %{{.*}} to <64 x i1>
+  // OGCG: bitcast i64 %{{.*}} to <64 x i1>
+  // OGCG: or <64 x i1> {{.*}}, {{.*}}
+  // OGCG: bitcast <64 x i1> {{.*}} to i64
+  // OGCG: icmp eq i64 {{.*}}, 0
+  // OGCG: zext i1 {{.*}} to i32
+  // OGCG: trunc i32 {{.*}} to i8
+  return _kortestz_mask64_u8(__A, __B);
+}
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c 
b/clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
index 5d81f666271be..56f227fb3784d 100644
--- a/clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
+++ b/clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
@@ -208,3 +208,68 @@ __mmask8 test_kmov_b(__mmask8 A) {
  // OGCG: bitcast <8 x i1> {{.*}} to i8
  return __builtin_ia32_kmovb(A);
 }
+
+
+unsigned char test_kortestc_mask8_u8(__mmask8 __A, __mmask8 __B) {
+// CIR-LABEL: _kortestc_mask8_u8
+// CIR: [[ALL_ONES:%.*]] = cir.const #cir.int<255> : !u8i
+// CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u8i -> !cir.vector<8 x 
!cir.int<u, 1>>
+// CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u8i -> !cir.vector<8 x 
!cir.int<u, 1>>
+// CIR: [[OR:%.*]] = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<8 x 
!cir.int<u, 1>>
+// CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<8 x !cir.int<u, 
1>> -> !u8i
+// CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ALL_ONES]]) : !u8i, !cir.bool
+// CIR: cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+// CIR: cir.cast integral {{.*}} : !s32i -> !u8i
+
+
+// LLVM-LABEL: _kortestc_mask8_u8
+// LLVM: [[LHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+// LLVM: [[RHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+// LLVM: [[OR:%.*]] = or <8 x i1> [[LHS]], [[RHS]]
+// LLVM: [[CAST:%.*]] = bitcast <8 x i1> [[OR]] to i8
+// LLVM: [[CMP:%.*]] = icmp eq i8 [[CAST]], -1
+// LLVM: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+// LLVM: trunc i32 [[ZEXT]] to i8
+
+// OGCG-LABEL: _kortestc_mask8_u8
+// OGCG: bitcast i8 %{{.*}} to <8 x i1>
+// OGCG: bitcast i8 %{{.*}} to <8 x i1>
+// OGCG: or <8 x i1> {{.*}}, {{.*}}
+// OGCG: bitcast <8 x i1> {{.*}} to i8
+// OGCG: icmp eq i8 {{.*}}, -1
+// OGCG: zext i1 {{.*}} to i32
+// OGCG: trunc i32 {{.*}} to i8
+ return _kortestc_mask8_u8(__A,__B);
+}
+
+unsigned char test_kortestz_mask8_u8(__mmask8 __A, __mmask8 __B) {
+// CIR-LABEL: _kortestz_mask8_u8
+// CIR: [[ZERO:%.*]] = cir.const #cir.int<0> : !u8i
+// CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u8i -> !cir.vector<8 x 
!cir.int<u, 1>>
+// CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u8i -> !cir.vector<8 x 
!cir.int<u, 1>>
+// CIR: [[OR:%.*]] = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<8 x 
!cir.int<u, 1>>
+// CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<8 x !cir.int<u, 
1>> -> !u8i
+// CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ZERO]]) : !u8i, !cir.bool
+// CIR: cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+// CIR: cir.cast integral {{.*}} : !s32i -> !u8i
+
+
+// LLVM-LABEL: _kortestz_mask8_u8
+// LLVM: [[LHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+// LLVM: [[RHS:%.*]] = bitcast i8 %{{.*}} to <8 x i1>
+// LLVM: [[OR:%.*]] = or <8 x i1> [[LHS]], [[RHS]]
+// LLVM: [[CAST:%.*]] = bitcast <8 x i1> [[OR]] to i8
+// LLVM: [[CMP:%.*]] = icmp eq i8 [[CAST]], 0
+// LLVM: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
+// LLVM: trunc i32 [[ZEXT]] to i8
+
+// OGCG-LABEL: _kortestz_mask8_u8
+// OGCG: bitcast i8 %{{.*}} to <8 x i1>
+// OGCG: bitcast i8 %{{.*}} to <8 x i1>
+// OGCG: or <8 x i1> {{.*}}, {{.*}}
+// OGCG: bitcast <8 x i1> {{.*}} to i8
+// OGCG: icmp eq i8 {{.*}}, 0
+// OGCG: zext i1 {{.*}} to i32
+// OGCG: trunc i32 {{.*}} to i8
+ return _kortestz_mask8_u8(__A,__B);
+}
diff --git a/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c 
b/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
index 31d6bc3d22408..124f8404dd800 100644
--- a/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
+++ b/clang/test/CIR/CodeGenBuiltins/X86/avx512f-builtins.c
@@ -228,3 +228,59 @@ __mmask16 test_kmov_w(__mmask16 A) {
   // OGCG: bitcast <16 x i1> {{.*}} to i16
   return __builtin_ia32_kmovw(A);
 }
+
+int test_mm512_kortestc(__mmask16 __A, __mmask16 __B) {
+  // CIR-LABEL: _mm512_kortestc
+  // CIR: [[ALL_ONES:%.*]] = cir.const #cir.int<65535> : !u16i
+  // CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u16i -> !cir.vector<16 x 
!cir.int<u, 1>>
+  // CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u16i -> !cir.vector<16 x 
!cir.int<u, 1>>
+  // CIR: [[OR:%.*]] = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<16 x 
!cir.int<u, 1>>
+  // CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<16 x 
!cir.int<u, 1>> -> !u16i
+  // CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ALL_ONES]]) : !u16i, 
!cir.bool
+  // CIR: cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+
+  // LLVM-LABEL: _mm512_kortestc
+  // LLVM: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+  // LLVM: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+  // LLVM: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]
+  // LLVM: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i16
+  // LLVM: [[CMP:%.*]] = icmp eq i16 [[CAST]], -1
+  // LLVM: zext i1 [[CMP]] to i32
+
+  // OGCG-LABEL: _mm512_kortestc
+  // OGCG: bitcast i16 %{{.*}} to <16 x i1>
+  // OGCG: bitcast i16 %{{.*}} to <16 x i1>
+  // OGCG: or <16 x i1> {{.*}}, {{.*}}
+  // OGCG: bitcast <16 x i1> {{.*}} to i16
+  // OGCG: icmp eq i16 {{.*}}, -1
+  // OGCG: zext i1 {{.*}} to i32
+  return _mm512_kortestc(__A,__B);
+}
+
+int test_mm512_kortestz(__mmask16 __A, __mmask16 __B) {
+  // CIR-LABEL: _mm512_kortestz
+  // CIR: [[ZERO:%.*]] = cir.const #cir.int<0> : !u16i
+  // CIR: [[LHS:%.*]] = cir.cast bitcast {{.*}} : !u16i -> !cir.vector<16 x 
!cir.int<u, 1>>
+  // CIR: [[RHS:%.*]] = cir.cast bitcast {{.*}} : !u16i -> !cir.vector<16 x 
!cir.int<u, 1>>
+  // CIR: [[OR:%.*]] = cir.binop(or, [[LHS]], [[RHS]]) : !cir.vector<16 x 
!cir.int<u, 1>>
+  // CIR: [[OR_INT:%.*]] = cir.cast bitcast [[OR]] : !cir.vector<16 x 
!cir.int<u, 1>> -> !u16i
+  // CIR: [[CMP:%.*]] = cir.cmp(eq, [[OR_INT]], [[ZERO]]) : !u16i, !cir.bool
+  // CIR: cir.cast bool_to_int [[CMP]] : !cir.bool -> !s32i
+
+  // LLVM-LABEL: _mm512_kortestz
+  // LLVM: [[LHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+  // LLVM: [[RHS:%.*]] = bitcast i16 %{{.*}} to <16 x i1>
+  // LLVM: [[OR:%.*]] = or <16 x i1> [[LHS]], [[RHS]]
+  // LLVM: [[CAST:%.*]] = bitcast <16 x i1> [[OR]] to i16
+  // LLVM: [[CMP:%.*]] = icmp eq i16 [[CAST]], 0
+  // LLVM: zext i1 [[CMP]] to i32
+
+  // OGCG-LABEL: _mm512_kortestz
+  // OGCG: bitcast i16 %{{.*}} to <16 x i1>
+  // OGCG: bitcast i16 %{{.*}} to <16 x i1>
+  // OGCG: or <16 x i1> {{.*}}, {{.*}}
+  // OGCG: bitcast <16 x i1> {{.*}} to i16
+  // OGCG: icmp eq i16 {{.*}}, 0
+  // OGCG: zext i1 {{.*}} to i32
+  return _mm512_kortestz(__A,__B);
+}

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