================
@@ -115,6 +119,40 @@ static mlir::Value emitX86MaskLogic(CIRGenBuilderTy
&builder,
ops[0].getType());
}
+static mlir::Value emitX86FunnelShift(CIRGenBuilderTy &builder,
+ mlir::Location location, mlir::Value
&op0,
+ mlir::Value &op1, mlir::Value &amt,
+ bool isRight) {
+ mlir::Type op0Ty = op0.getType();
+
+ // Amount may be scalar immediate, in which case create a splat vector.
+ // Funnel shifts amounts are treated as modulo and types are all power-of-2
+ // so we only care about the lowest log2 bits anyway.
+ if (amt.getType() != op0Ty) {
+ auto vecTy = mlir::cast<cir::VectorType>(op0Ty);
+ uint64_t numElems = vecTy.getSize();
+
+ auto amtTy = mlir::cast<cir::IntType>(amt.getType());
+ auto vecElemTy = mlir::cast<cir::IntType>(vecTy.getElementType());
+
+ // Cast to same width unsigned if not already unsigned.
+ if (amtTy.isSigned()) {
+ cir::IntType unsignedAmtTy = builder.getUIntNTy(amtTy.getWidth());
+ amt = builder.createIntCast(amt, unsignedAmtTy);
+ }
+ // Cast the unsigned `amt` to operand element type's width unsigned.
----------------
andykaylor wrote:
@AmrDeveloper Which two lines are you saying can be removed?
@moar55 A comment explaining the zero-extension would be good.
https://github.com/llvm/llvm-project/pull/169566
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