Tests added in r213364. Cheers,
-Yi On 18 July 2014 03:05, Saleem Abdulrasool <[email protected]> wrote: > On Thu, Jul 17, 2014 at 5:45 AM, Yi Kong <[email protected]> wrote: >> >> Author: kongyi >> Date: Thu Jul 17 07:45:17 2014 >> New Revision: 213261 >> >> URL: http://llvm.org/viewvc/llvm-project?rev=213261&view=rev >> Log: >> ARM: Add ACLE memory barrier intrinsic mapping >> >> Modified: >> cfe/trunk/lib/Headers/arm_acle.h >> cfe/trunk/test/CodeGen/arm_acle.c >> >> Modified: cfe/trunk/lib/Headers/arm_acle.h >> URL: >> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/arm_acle.h?rev=213261&r1=213260&r2=213261&view=diff >> >> ============================================================================== >> --- cfe/trunk/lib/Headers/arm_acle.h (original) >> +++ cfe/trunk/lib/Headers/arm_acle.h Thu Jul 17 07:45:17 2014 >> @@ -33,8 +33,15 @@ >> #if defined(__cplusplus) >> extern "C" { >> #endif >> - >> + >> /* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */ >> +/* 8.3 Memory barriers */ >> +#if !defined(_MSC_VER) >> +#define __dmb(i) __builtin_arm_dmb(i) >> +#define __dsb(i) __builtin_arm_dsb(i) >> +#define __isb(i) __builtin_arm_isb(i) >> +#endif >> + >> /* 8.4 Hints */ >> >> #if !defined(_MSC_VER) >> >> Modified: cfe/trunk/test/CodeGen/arm_acle.c >> URL: >> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm_acle.c?rev=213261&r1=213260&r2=213261&view=diff >> >> ============================================================================== >> --- cfe/trunk/test/CodeGen/arm_acle.c (original) >> +++ cfe/trunk/test/CodeGen/arm_acle.c Thu Jul 17 07:45:17 2014 >> @@ -3,8 +3,30 @@ >> >> #include <arm_acle.h> >> >> -/* Hints */ >> +/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */ >> +/* 8.3 Memory Barriers */ >> +// ARM-LABEL: test_dmb >> +// AArch32: call void @llvm.arm.dmb(i32 1) >> +// AArch64: call void @llvm.aarch64.dmb(i32 1) >> +void test_dmb(void) { >> + __dmb(1); >> +} >> >> +// ARM-LABEL: test_dsb >> +// AArch32: call void @llvm.arm.dsb(i32 2) >> +// AArch64: call void @llvm.aarch64.dsb(i32 2) >> +void test_dsb(void) { >> + __dsb(2); >> +} >> + >> +// ARM-LABEL: test_isb >> +// AArch32: call void @llvm.arm.isb(i32 3) >> +// AArch64: call void @llvm.aarch64.isb(i32 3) >> +void test_isb(void) { >> + __isb(3); >> +} >> + >> +/* 8.4 Hints */ >> // ARM-LABEL: test_yield >> // AArch32: call void @llvm.arm.hint(i32 1) >> // AArch64: call void @llvm.aarch64.hint(i32 1) >> > > Might be nice to have an additional test to ensure that someone doesn't > accidentally change the definitions such that they can take a non-constant > value. > >> >> _______________________________________________ >> cfe-commits mailing list >> [email protected] >> http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits > > > > > -- > Saleem Abdulrasool > compnerd (at) compnerd (dot) org > > _______________________________________________ > cfe-commits mailing list > [email protected] > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits > _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
