[Same patch, better diff]
http://reviews.llvm.org/D5314
Files:
src/Unwind/UnwindRegistersRestore.S
src/Unwind/UnwindRegistersSave.S
Index: src/Unwind/UnwindRegistersRestore.S
===================================================================
--- src/Unwind/UnwindRegistersRestore.S
+++ src/Unwind/UnwindRegistersRestore.S
@@ -310,23 +310,35 @@
#elif __arm__ && !__APPLE__
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
+ .thumb
+#endif
+
@
@ void libunwind::Registers_arm::restoreCoreAndJumpTo()
@
@ On entry:
@ thread_state pointer is in r0
@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm20restoreCoreAndJumpToEv)
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
+ ldr r2, [r0, #52]
+ ldr r3, [r0, #60]
+ mov sp, r2
+ mov lr, r3 @ restore pc into lr
+ ldm r0, {r0-r7}
+#else
@ Use lr as base so that r0 can be restored.
mov lr, r0
@ 32bit thumb-2 restrictions for ldm:
@ . the sp (r13) cannot be in the list
@ . the pc (r15) and lr (r14) cannot both be in the list in an LDM instruction
ldm lr, {r0-r12}
ldr sp, [lr, #52]
ldr lr, [lr, #60] @ restore pc into lr
-#if __ARM_ARCH > 4
+#endif
+#if __ARM_ARCH > 4 || __ARM_ARCH_4T__
bx lr
#else
mov pc, lr
@@ -340,8 +352,9 @@
@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMDEPy)
+#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)
@ VFP and iwMMX instructions are only available when compiling with the flags
- @ that enable them. We don't want to do that in the library (because we don't
+ @ that enable them. We do not want to do that in the library (because we do not
@ want the compiler to generate instructions that access those) but this is
@ only accessed if the personality routine needs these registers. Use of
@ these registers implies they are, actually, available on the target, so
@@ -352,6 +365,7 @@
#else
vldmia r0, {d0-d15}
#endif
+#endif
mov pc, lr
@
@@ -363,10 +377,12 @@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMXEPy)
#if __ARM_ARCH < 7
+#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)
ldc p11, cr0, [r0], {0x21} @ fldmiax r0, {d0-d15}
#else
vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
#endif
+#endif
mov pc, lr
@
@@ -378,10 +394,12 @@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
#if __ARM_ARCH < 7
+#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)
ldcl p11, cr0, [r0], {0x20} @ vldm r0, {d16-d31}
#else
vldmia r0, {d16-d31}
#endif
+#endif
mov pc, lr
@
@@ -392,6 +410,7 @@
@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreiWMMXEPy)
+#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || __ARM_WMMX
ldcl p1, cr0, [r0], #8 @ wldrd wR0, [r0], #8
ldcl p1, cr1, [r0], #8 @ wldrd wR1, [r0], #8
ldcl p1, cr2, [r0], #8 @ wldrd wR2, [r0], #8
@@ -408,6 +427,7 @@
ldcl p1, cr13, [r0], #8 @ wldrd wR13, [r0], #8
ldcl p1, cr14, [r0], #8 @ wldrd wR14, [r0], #8
ldcl p1, cr15, [r0], #8 @ wldrd wR15, [r0], #8
+#endif
mov pc, lr
@
@@ -417,11 +437,13 @@
@ values pointer is in r0
@
.p2align 2
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreiWMMXControlEPj)
+DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreiWMMXControlEPm)
+#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || __ARM_WMMX
ldc2 p1, cr8, [r0], #4 @ wldrw wCGR0, [r0], #4
ldc2 p1, cr9, [r0], #4 @ wldrw wCGR1, [r0], #4
ldc2 p1, cr10, [r0], #4 @ wldrw wCGR2, [r0], #4
ldc2 p1, cr11, [r0], #4 @ wldrw wCGR3, [r0], #4
+#endif
mov pc, lr
#endif
Index: src/Unwind/UnwindRegistersSave.S
===================================================================
--- src/Unwind/UnwindRegistersSave.S
+++ src/Unwind/UnwindRegistersSave.S
@@ -282,6 +282,10 @@
#elif __arm__ && !__APPLE__
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
+ .thumb
+#endif
+
@
@ extern int unw_getcontext(unw_context_t* thread_state)
@
@@ -296,15 +300,24 @@
@
.p2align 2
DEFINE_LIBUNWIND_FUNCTION(unw_getcontext)
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
+ stm r0!, {r0-r7}
+ mov r2, sp
+ mov r3, lr
+ str r2, [r0, #52]
+ str r3, [r0, #56]
+ str r3, [r0, #60] @ store return address as pc
+#else
@ 32bit thumb-2 restrictions for stm:
@ . the sp (r13) cannot be in the list
@ . the pc (r15) cannot be in the list in an STM instruction
stm r0, {r0-r12}
str sp, [r0, #52]
str lr, [r0, #56]
str lr, [r0, #60] @ store return address as pc
+#endif
mov r0, #0 @ return UNW_ESUCCESS
-#if __ARM_ARCH > 4
+#if __ARM_ARCH > 4 || __ARM_ARCH_4T__
bx lr
#else
mov pc, lr
@@ -319,10 +332,12 @@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
#if __ARM_ARCH < 7
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
stc p11, cr0, [r0], {0x20} @ fstmiad r0, {d0-d15}
#else
vstmia r0, {d0-d15}
#endif
+#endif
mov pc, lr
@
@@ -334,10 +349,12 @@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPy)
#if __ARM_ARCH < 7
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
stc p11, cr0, [r0], {0x21} @ fstmiax r0, {d0-d15}
#else
vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
#endif
+#endif
mov pc, lr
@
@@ -348,8 +365,9 @@
@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveVFPv3EPy)
+#if defined(__ARM_ARCH_6M__) || defined(__ARM_ARCH_6SM__)
@ VFP and iwMMX instructions are only available when compiling with the flags
- @ that enable them. We don't want to do that in the library (because we don't
+ @ that enable them. We do not want to do that in the library (because we do not
@ want the compiler to generate instructions that access those) but this is
@ only accessed if the personality routine needs these registers. Use of
@ these registers implies they are, actually, available on the target, so
@@ -360,6 +378,7 @@
#else
vstmia r0, {d16-d31}
#endif
+#endif
mov pc, lr
@
@@ -370,6 +389,7 @@
@
.p2align 2
DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm9saveiWMMXEPy)
+#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || __ARM_WMMX
stcl p1, cr0, [r0], #8 @ wstrd wR0, [r0], #8
stcl p1, cr1, [r0], #8 @ wstrd wR1, [r0], #8
stcl p1, cr2, [r0], #8 @ wstrd wR2, [r0], #8
@@ -386,6 +406,7 @@
stcl p1, cr13, [r0], #8 @ wstrd wR13, [r0], #8
stcl p1, cr14, [r0], #8 @ wstrd wR14, [r0], #8
stcl p1, cr15, [r0], #8 @ wstrd wR15, [r0], #8
+#endif
mov pc, lr
@
@@ -395,11 +416,13 @@
@ values pointer is in r0
@
.p2align 2
-DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControlEPj)
+DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveiWMMXControlEPm)
+#if (!defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_6SM__)) || __ARM_WMMX
stc2 p1, cr8, [r0], #4 @ wstrw wCGR0, [r0], #4
stc2 p1, cr9, [r0], #4 @ wstrw wCGR1, [r0], #4
stc2 p1, cr10, [r0], #4 @ wstrw wCGR2, [r0], #4
stc2 p1, cr11, [r0], #4 @ wstrw wCGR3, [r0], #4
+#endif
mov pc, lr
#endif
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