LGTM. Akira: Did you want to work on tightening up the checks via cpu features?
-eric On Thu, Sep 18, 2014 at 1:31 PM, Hans Wennborg <[email protected]> wrote: > I guess the 'x' is also only valid when the target supports SSE, 'y' > only when it supports MMX, etc. We don't seem to have any checks for > this at the moment, though. > > Is the attached patch OK? > > On Thu, Sep 18, 2014 at 1:29 PM, Eric Christopher <[email protected]> wrote: >> Which means the check should probably be either a) more complicated to >> be tight, or b) loosened to where Hans's patch is going. >> >> -eric >> >> On Thu, Sep 18, 2014 at 1:27 PM, Eric Christopher <[email protected]> wrote: >>> Yarr. >>> >>> -eric >>> >>> On Thu, Sep 18, 2014 at 1:27 PM, Akira Hatanaka <[email protected]> wrote: >>>> I didn’t know ‘x’ can also mean 256-bit ‘ymm’ registers. Is this legal >>>> only if the target supports avx? >>>> >>>> Thanks. >>>> >>>> On Sep 18, 2014, at 1:20 PM, Eric Christopher <[email protected]> wrote: >>>> >>>>> You could probably create a 512-byte data structure to get it to fail >>>>> as well. (Though the explicit no-error is nice too, thanks) >>>>> >>>>> -eric >>>>> >>>>> On Thu, Sep 18, 2014 at 1:04 PM, Hans Wennborg <[email protected]> wrote: >>>>>> On Thu, Sep 18, 2014 at 11:34 AM, Eric Christopher <[email protected]> >>>>>> wrote: >>>>>>>> >>>>>>> >>>>>>> >>>>>>>> + case 'x': >>>>>>>> + case 'f': >>>>>>>> + case 't': >>>>>>>> + case 'u': >>>>>>>> + return Size <= 128; >>>>>>> >>>>>>> >>>>>>> Hans pointed out that you'll have problems here with _m256 and wanting >>>>>>> an >>>>>>> avx register. There is, afaict, no separate constraint for "gimme an avx >>>>>>> register" that's different from SSE registers. There is the 'v' >>>>>>> constraint >>>>>>> which works for avx 512 (evex encoded) registers. >>>>>> >>>>>> How about the attached patch? >>>>>> >>>>>> - Hans >>>> _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
