Why have avx, fma4, and sse4a been added to CK_BDVER1? xop implies all of those. Can we use comments instead?
On Wed, Nov 5, 2014 at 9:21 AM, Andrea Di Biagio < [email protected]> wrote: > Hi rnk, craig.topper, qcolombet, > > Hi Reid, Quentin (and all), > > This patch slightly refactors how clang sets default features for AMD > bdver cpus. > Method 'getDefaultFeatures' (in Basic/Targets.cpp), already uses a > fallthrough mechanism to set default features for 'bdver4', bdver3 and > bdver2. This patch simply adds another fallthrough from case 'CK_BDVER2' to > case 'CK_BDVER1'. That is because 'bdver2' has the same features available > in 'bdver1' plus BMI,FMA,F16C and TBM etc. > > While at it, I added missing checks for features in test > predefined-arch-macros.c. > In the case of BTVER2, this patch adds explicit checks for __F16C__, > __BMI__ and __PCLMUL__. > In the case of BDVER3 and BDVER4, this patch checks for the presence of > __FSGSBASE__ (added at r221130). > > Please let me know if ok to submit. > > Thanks, > Andrea > > http://reviews.llvm.org/D6134 > > Files: > lib/Basic/Targets.cpp > test/Preprocessor/predefined-arch-macros.c > -- ~Craig
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