Wow, I had to two bugs in ten lines of code. Thanks for the fixes, Craig! Adam
> On Jan 31, 2015, at 11:35 PM, Craig Topper <[email protected]> wrote: > > Author: ctopper > Date: Sun Feb 1 01:35:40 2015 > New Revision: 227713 > > URL: http://llvm.org/viewvc/llvm-project?rev=227713&view=rev > Log: > [X86] Rename _mm512_valign_epi64/32 intrinsics to _mm512_alignr_epi64/32 to > match Intel docs. Make immediate argument to them an ICE. Fix mask size for > the alignd version. > > Modified: > cfe/trunk/include/clang/Basic/BuiltinsX86.def > cfe/trunk/lib/Headers/avx512fintrin.h > cfe/trunk/test/CodeGen/avx512f-builtins.c > > Modified: cfe/trunk/include/clang/Basic/BuiltinsX86.def > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsX86.def?rev=227713&r1=227712&r2=227713&view=diff > ============================================================================== > --- cfe/trunk/include/clang/Basic/BuiltinsX86.def (original) > +++ cfe/trunk/include/clang/Basic/BuiltinsX86.def Sun Feb 1 01:35:40 2015 > @@ -922,8 +922,8 @@ BUILTIN(__builtin_ia32_vpermt2vard512_ma > BUILTIN(__builtin_ia32_vpermt2varq512_mask, "V8LLiV8LLiV8LLiV8LLiUc", "") > BUILTIN(__builtin_ia32_vpermt2varps512_mask, "V16fV16iV16fV16fUs", "") > BUILTIN(__builtin_ia32_vpermt2varpd512_mask, "V8dV8LLiV8dV8dUc", "") > -BUILTIN(__builtin_ia32_alignq512_mask, "V8LLiV8LLiV8LLiUcV8LLiUc", "") > -BUILTIN(__builtin_ia32_alignd512_mask, "V16iV16iV16iUcV16iUc", "") > +BUILTIN(__builtin_ia32_alignq512_mask, "V8LLiV8LLiV8LLiIcV8LLiUc", "") > +BUILTIN(__builtin_ia32_alignd512_mask, "V16iV16iV16iIcV16iUs", "") > BUILTIN(__builtin_ia32_extractf64x4_mask, "V4dV8dIcV4dUc", "") > BUILTIN(__builtin_ia32_extractf32x4_mask, "V4fV16fIcV4fUc", "") > BUILTIN(__builtin_ia32_gathersiv8df, "V8dV8dvC*V8iUcIi", "") > > Modified: cfe/trunk/lib/Headers/avx512fintrin.h > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/avx512fintrin.h?rev=227713&r1=227712&r2=227713&view=diff > ============================================================================== > --- cfe/trunk/lib/Headers/avx512fintrin.h (original) > +++ cfe/trunk/lib/Headers/avx512fintrin.h Sun Feb 1 01:35:40 2015 > @@ -606,25 +606,17 @@ _mm512_permutex2var_ps(__m512 __A, __m51 > (__mmask16) -1); > } > > -static __inline __m512i __attribute__ ((__always_inline__, __nodebug__)) > -_mm512_valign_epi64(__m512i __A, __m512i __B, const int __I) > -{ > - return (__m512i) __builtin_ia32_alignq512_mask((__v8di)__A, > - (__v8di)__B, > - __I, > - > (__v8di)_mm512_setzero_si512(), > - (__mmask8) -1); > -} > +#define _mm512_alignr_epi64(A, B, I) __extension__ ({ \ > + (__m512i)__builtin_ia32_alignq512_mask((__v8di)(__m512i)(A), \ > + (__v8di)(__m512i)(B), \ > + (I), > (__v8di)_mm512_setzero_si512(), \ > + (__mmask8)-1); }) > > -static __inline __m512i __attribute__ ((__always_inline__, __nodebug__)) > -_mm512_valign_epi32(__m512i __A, __m512i __B, const int __I) > -{ > - return (__m512i)__builtin_ia32_alignd512_mask((__v16si)__A, > - (__v16si)__B, > - __I, > - > (__v16si)_mm512_setzero_si512(), > - (__mmask16) -1); > -} > +#define _mm512_alignr_epi32(A, B, I) __extension__ ({ \ > + (__m512i)__builtin_ia32_alignd512_mask((__v16si)(__m512i)(A), \ > + (__v16si)(__m512i)(B), \ > + (I), > (__v16si)_mm512_setzero_si512(), \ > + (__mmask16)-1); }) > > /* Vector Extract */ > > > Modified: cfe/trunk/test/CodeGen/avx512f-builtins.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/avx512f-builtins.c?rev=227713&r1=227712&r2=227713&view=diff > ============================================================================== > --- cfe/trunk/test/CodeGen/avx512f-builtins.c (original) > +++ cfe/trunk/test/CodeGen/avx512f-builtins.c Sun Feb 1 01:35:40 2015 > @@ -173,11 +173,18 @@ __mmask16 test_mm512_knot(__mmask16 a) > return _mm512_knot(a); > } > > -__m512i test_mm512_valign_epi64(__m512i a, __m512i b) > +__m512i test_mm512_alignr_epi32(__m512i a, __m512i b) > { > - // CHECK-LABEL: @test_mm512_valign_epi64 > + // CHECK-LABEL: @test_mm512_alignr_epi32 > + // CHECK: @llvm.x86.avx512.mask.valign.d.512 > + return _mm512_alignr_epi32(a, b, 2); > +} > + > +__m512i test_mm512_alignr_epi64(__m512i a, __m512i b) > +{ > + // CHECK-LABEL: @test_mm512_alignr_epi64 > // CHECK: @llvm.x86.avx512.mask.valign.q.512 > - return _mm512_valign_epi64(a, b, 2); > + return _mm512_alignr_epi64(a, b, 2); > } > > __m512d test_mm512_broadcastsd_pd(__m128d a) > > > _______________________________________________ > cfe-commits mailing list > [email protected] > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
