On Sep 13, 2011, at 8:43 AM, Jeffrey Yasskin wrote: > On Tue, Sep 13, 2011 at 1:38 AM, John McCall <[email protected]> wrote: >> Is this worth thinking about? Specifically, will full SC compile any >> differently from acquiring loads and releasing stores on any of the >> Apple architectures? > > On x86, SC stores use xchg instructions rather than movs, which makes > them slower. On ARM, I believe SC requires an extra DMB after stores, > compared to acq/rel operations: > http://www.decadent.org.uk/pipermail/cpp-threads/2008-December/001953.html.
Okay, thanks! It looks like we intentionally don't make any causality guarantees at all — as long as atomic property reads produce a value that at some point was written into the ivar, that's good enough. So llvm::Unordered should be fine. Thanks for the advice. John. _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
