This time with the patch :-(
________________________________
From: Carter, Jack
Sent: Friday, March 30, 2012 7:05 PM
To: [email protected]
Cc: [email protected]
Subject: Mips inline constraint register patch. Request for review and commit.
Mips_reg_constraint.patch
Contributor: Jack Carter
Inline asm directives have constraint characters that describe what is legal
for the particular operand. Some of these constraints state that the operand
is a register, specific or general.
This patch adds 3 different characters to the list of characters that represents
registers:
'c': A register suitable for use in an indirect jump.
'l': The lo register.
'x': The concatenated hi and lo registers.
This patch does not address the semantic behavior.
Index: test/CodeGen/mips-constraint-regs.c
===================================================================
--- test/CodeGen/mips-constraint-regs.c (revision 0)
+++ test/CodeGen/mips-constraint-regs.c (revision 0)
@@ -0,0 +1,49 @@
+// RUN: %clang -target mipsel-unknown-linux -ccc-clang-archs mipsel -S -o - -emit-llvm %s
+
+/*
+ This checks that the frontend will accept inline asm constraints
+ 'c', 'l' and 'x'. Semantic checkign will happen in the
+ llvm backend.
+
+ Any bad constraint letters will cause the frontend to error out.
+
+ These exerpts come from test cases that run under gcc
+ */
+
+int main()
+{
+ // 'c': 16 bit address register for Mips16, GPR for all others
+ // I am using 'c' to constrain both the target and one of the source
+ // registers. We are looking for syntactical correctness.
+ int __s, __v = 17;
+ int __t;
+ __asm__ __volatile__(
+ "addi %0,%1,%2 \n\t\t"
+ : "=c" (__t)
+ : "c" (__s), "I" (__v));
+
+ // 'l': lo register
+ // We are making it clear that destination register is lo with the
+ // use of the 'l' constraint ("=l").
+ int i_temp = 44;
+ int i_result;
+ __asm__ __volatile__(
+ "mtlo %1 \n\t\t"
+ : "=l" (i_result)
+ : "r" (i_temp)
+ : "lo");
+
+ // 'x': Combined lo/hi registers
+ // We are specifying that destination registers are the hi/lo pair with the
+ // use of the 'x' constraint ("=x").
+ int i_hi = 3;
+ int i_lo = 2;
+ long long ll_result = 0;
+ __asm__ __volatile__(
+ "mthi %1 \n\t\t"
+ "mtlo %2 \n\t\t"
+ : "=x" (ll_result)
+ : "r" (i_hi), "r" (i_lo)
+ : );
+ return 0;
+}
Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp (revision 153675)
+++ lib/Basic/Targets.cpp (working copy)
@@ -3521,6 +3521,9 @@
case 'd': // Equivalent to "r" unless generating MIPS16 code.
case 'y': // Equivalent to "r", backwards compatibility only.
case 'f': // floating-point registers.
+ case 'c': // $25 for indirect jumps
+ case 'l': // lo register
+ case 'x': // hilo register pair
Info.setAllowsRegister();
return true;
}
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