diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 96b12ba..638d6a0 100644
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -3560,7 +3560,7 @@ public:
 
     // ARM has atomics up to 8 bytes
     // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
-    MaxAtomicPromoteWidth = 64;
+    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
 
     // Do force alignment of members that follow zero length bitfields.  If
     // the alignment of the zero-length bitfield is greater than the member 
diff --git a/test/CodeGen/c11atomics.c b/test/CodeGen/c11atomics.c
index 8d298af..0c6b619 100644
--- a/test/CodeGen/c11atomics.c
+++ b/test/CodeGen/c11atomics.c
@@ -140,8 +140,6 @@ void testFloat(_Atomic(float) *fp) {
 // CHECK:      [[FP:%.*]] = alloca float*
 // CHECK-NEXT: [[X:%.*]] = alloca float
 // CHECK-NEXT: [[F:%.*]] = alloca float
-// CHECK-NEXT: [[TMP0:%.*]] = alloca float
-// CHECK-NEXT: [[TMP1:%.*]] = alloca float
 // CHECK-NEXT: store float* {{%.*}}, float** [[FP]]
 
 // CHECK-NEXT: [[T0:%.*]] = load float** [[FP]]
@@ -152,19 +150,17 @@ void testFloat(_Atomic(float) *fp) {
   _Atomic(float) x = 2.0f;
 
 // CHECK-NEXT: [[T0:%.*]] = load float** [[FP]]
-// CHECK-NEXT: [[T1:%.*]] = bitcast float* [[T0]] to i8*
-// CHECK-NEXT: [[T2:%.*]] = bitcast float* [[TMP0]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 4, i8* [[T1]], i8* [[T2]], i32 5)
-// CHECK-NEXT: [[T3:%.*]] = load float* [[TMP0]], align 4
-// CHECK-NEXT: store float [[T3]], float* [[F]]
+// CHECK-NEXT: [[T1:%.*]] = bitcast float* [[T0]] to i32*
+// CHECK-NEXT: [[AL:%.*]] = load atomic i32* [[T1]] seq_cst, align 4
+// CHECK-NEXT: [[T2:%.*]] = bitcast i32 [[AL]] to float
+// CHECK-NEXT: store float [[T2]], float* [[F]], align 4
   float f = *fp;
 
 // CHECK-NEXT: [[T0:%.*]] = load float* [[F]], align 4
 // CHECK-NEXT: [[T1:%.*]] = load float** [[FP]], align 4
-// CHECK-NEXT: store float [[T0]], float* [[TMP1]], align 4
-// CHECK-NEXT: [[T2:%.*]] = bitcast float* [[T1]] to i8*
-// CHECK-NEXT: [[T3:%.*]] = bitcast float* [[TMP1]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 4, i8* [[T2]], i8* [[T3]], i32 5)
+// CHECK-NEXT: [[T2:%.*]] = bitcast float [[T0]] to i32
+// CHECK-NEXT: [[T3:%.*]] = bitcast float* [[T1]] to i32*
+// CHECK-NEXT: store atomic i32 [[T2]], i32* [[T3]] seq_cst, align 4
   *fp = f;
 
 // CHECK-NEXT: ret void
@@ -193,9 +189,10 @@ void testComplexFloat(_Atomic(_Complex float) *fp) {
   _Atomic(_Complex float) x = 2.0f;
 
 // CHECK-NEXT: [[T0:%.*]] = load [[CF]]** [[FP]]
-// CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[T0]] to i8*
-// CHECK-NEXT: [[T2:%.*]] = bitcast [[CF]]* [[TMP0]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
+// CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[T0]] to i64*
+// CHECK-NEXT: [[AL:%.*]] = load atomic i64* [[T1]] seq_cst, align 8
+// CHECK-NEXT: [[T3:%.*]] = bitcast [[CF]]* [[TMP0]] to i64*
+// CHECK-NEXT: store i64 [[AL]], i64* [[T3]], align 8
 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[TMP0]], i32 0, i32 0
 // CHECK-NEXT: [[R:%.*]] = load float* [[T0]]
 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[CF]]* [[TMP0]], i32 0, i32 1
@@ -215,9 +212,10 @@ void testComplexFloat(_Atomic(_Complex float) *fp) {
 // CHECK-NEXT: [[T1:%.*]] = getelementptr inbounds [[CF]]* [[TMP1]], i32 0, i32 1
 // CHECK-NEXT: store float [[R]], float* [[T0]]
 // CHECK-NEXT: store float [[I]], float* [[T1]]
-// CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[DEST]] to i8*
-// CHECK-NEXT: [[T1:%.*]] = bitcast [[CF]]* [[TMP1]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T0]], i8* [[T1]], i32 5)
+// CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[TMP1]] to i64*
+// CHECK-NEXT: [[T1:%.*]] = load i64* [[T0]], align 8
+// CHECK-NEXT: [[T0:%.*]] = bitcast [[CF]]* [[DEST]] to i64*
+// CHECK-NEXT: store atomic i64 [[T1]], i64* [[T0]] seq_cst, align 8
   *fp = f;
 
 // CHECK-NEXT: ret void
@@ -258,18 +256,20 @@ void testStruct(_Atomic(S) *fp) {
   _Atomic(S) x = (S){1,2,3,4};
 
 // CHECK-NEXT: [[T0:%.*]] = load [[S]]** [[FP]]
-// CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[T0]] to i8*
-// CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
+// CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[T0]] to i64*
+// CHECK-NEXT: [[AL:%.*]] = load atomic i64* [[T1]] seq_cst, align 8
+// CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i64*
+// CHECK-NEXT: store i64 [[AL]], i64* [[T2]], align 2
   S f = *fp;
 
 // CHECK-NEXT: [[T0:%.*]] = load [[S]]** [[FP]]
 // CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[TMP0]] to i8*
 // CHECK-NEXT: [[T2:%.*]] = bitcast [[S]]* [[F]] to i8*
 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T1]], i8* [[T2]], i32 8, i32 2, i1 false)
-// CHECK-NEXT: [[T3:%.*]] = bitcast [[S]]* [[T0]] to i8*
-// CHECK-NEXT: [[T4:%.*]] = bitcast [[S]]* [[TMP0]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T3]], i8* [[T4]], i32 5)
+// CHECK-NEXT: [[T1:%.*]] = bitcast [[S]]* [[TMP0]] to i64*
+// CHECK-NEXT: [[T2:%.*]] = load i64* [[T1]], align 8
+// CHECK-NEXT: [[T3:%.*]] = bitcast [[S]]* [[T0]] to i64*
+// CHECK-NEXT: store atomic i64 [[T2]], i64* [[T3]] seq_cst, align 8
   *fp = f;
 
 // CHECK-NEXT: ret void
@@ -309,9 +309,10 @@ void testPromotedStruct(_Atomic(PS) *fp) {
   _Atomic(PS) x = (PS){1,2,3};
 
 // CHECK-NEXT: [[T0:%.*]] = load [[APS]]** [[FP]]
-// CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i8*
-// CHECK-NEXT: [[T2:%.*]] = bitcast [[APS]]* [[TMP0]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_load(i32 8, i8* [[T1]], i8* [[T2]], i32 5)
+// CHECK-NEXT: [[T1:%.*]] = bitcast [[APS]]* [[T0]] to i64*
+// CHECK-NEXT: [[AL:%.*]] = load atomic i64* [[T1]] seq_cst, align 8
+// CHECK-NEXT: [[T0:%.*]] = bitcast [[APS]]* [[TMP0]] to i64*
+// CHECK-NEXT: store i64 [[AL]], i64* [[T0]], align 8
 // CHECK-NEXT: [[T0:%.*]] = getelementptr inbounds [[APS]]* [[TMP0]], i32 0, i32 0
 // CHECK-NEXT: [[T1:%.*]] = bitcast [[PS]]* [[F]] to i8*
 // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T0]] to i8*
@@ -323,9 +324,10 @@ void testPromotedStruct(_Atomic(PS) *fp) {
 // CHECK-NEXT: [[T2:%.*]] = bitcast [[PS]]* [[T1]] to i8*
 // CHECK-NEXT: [[T3:%.*]] = bitcast [[PS]]* [[F]] to i8*
 // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* [[T2]], i8* [[T3]], i32 6, i32 2, i1 false)
-// CHECK-NEXT: [[T4:%.*]] = bitcast [[APS]]* [[T0]] to i8*
-// CHECK-NEXT: [[T5:%.*]] = bitcast [[APS]]* [[TMP1]] to i8*
-// CHECK-NEXT: call arm_aapcscc void @__atomic_store(i32 8, i8* [[T4]], i8* [[T5]], i32 5)
+// CHECK-NEXT: [[T4:%.*]] = bitcast [[APS]]* [[TMP1]] to i64*
+// CHECK-NEXT: [[T5:%.*]] = load i64* [[T4]], align 8
+// CHECK-NEXT: [[T6:%.*]] = bitcast [[APS]]* [[T0]] to i64*
+// CHECK-NEXT: store atomic i64 [[T5]], i64* [[T6]] seq_cst, align 8
   *fp = f;
 
 // CHECK-NEXT: ret void