Hi Bill, Please apply this patch on 3.3 release branch. It's one of the two failures on ARM.
cheers, --renato On 13 May 2013 21:09, Rafael Espindola <[email protected]> wrote: > Author: rafael > Date: Mon May 13 15:09:47 2013 > New Revision: 181728 > > URL: http://llvm.org/viewvc/llvm-project?rev=181728&view=rev > Log: > Use atomic instructions on ARM linux. > > This is safe given how the pre-v6 atomic ops funcions in libgcc are > implemented. > > This fixes pr15429. > > Added: > cfe/trunk/test/CodeGen/linux-arm-atomic.c > Modified: > cfe/trunk/lib/Basic/Targets.cpp > > Modified: cfe/trunk/lib/Basic/Targets.cpp > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=181728&r1=181727&r2=181728&view=diff > > ============================================================================== > --- cfe/trunk/lib/Basic/Targets.cpp (original) > +++ cfe/trunk/lib/Basic/Targets.cpp Mon May 13 15:09:47 2013 > @@ -3527,6 +3527,20 @@ class ARMTargetInfo : public TargetInfo > > static const Builtin::Info BuiltinInfo[]; > > + static bool shouldUseInlineAtomic(const llvm::Triple &T) { > + // On linux, binaries targeting old cpus call functions in libgcc to > + // perform atomic operations. The implementation in libgcc then calls > into > + // the kernel which on armv6 and newer uses ldrex and strex. The net > result > + // is that if we assume the kernel is at least as recent as the > hardware, > + // it is safe to use atomic instructions on armv6 and newer. > + if (T.getOS() != llvm::Triple::Linux) > + return false; > + StringRef ArchName = T.getArchName(); > + if (ArchName.startswith("armv6") || ArchName.startswith("armv7")) > + return true; > + return false; > + } > + > public: > ARMTargetInfo(const std::string &TripleStr) > : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), > IsAAPCS(true) > @@ -3559,8 +3573,9 @@ public: > TheCXXABI.set(TargetCXXABI::GenericARM); > > // ARM has atomics up to 8 bytes > - // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e > MaxAtomicPromoteWidth = 64; > + if (shouldUseInlineAtomic(getTriple())) > + MaxAtomicInlineWidth = 64; > > // Do force alignment of members that follow zero length bitfields. > If > // the alignment of the zero-length bitfield is greater than the > member > > Added: cfe/trunk/test/CodeGen/linux-arm-atomic.c > URL: > http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/linux-arm-atomic.c?rev=181728&view=auto > > ============================================================================== > --- cfe/trunk/test/CodeGen/linux-arm-atomic.c (added) > +++ cfe/trunk/test/CodeGen/linux-arm-atomic.c Mon May 13 15:09:47 2013 > @@ -0,0 +1,10 @@ > +// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv7-unknown-linux | > FileCheck %s > +// RUN: %clang_cc1 %s -emit-llvm -o - -triple=armv6-unknown-linux | > FileCheck %s > + > +typedef int _Atomic_word; > +_Atomic_word exchange_and_add(volatile _Atomic_word *__mem, int __val) { > + return __atomic_fetch_add(__mem, __val, __ATOMIC_ACQ_REL); > +} > + > +// CHECK: define {{.*}} @exchange_and_add > +// CHECK: atomicrmw {{.*}} add > > > _______________________________________________ > cfe-commits mailing list > [email protected] > http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits >
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