Author: awatry Date: Mon Aug 12 09:42:51 2013 New Revision: 188181 URL: http://llvm.org/viewvc/llvm-project?rev=188181&view=rev Log: Add intN vloadN() implementations for address spaces 3 and 4
Not hooked up to R600 yet due to current lack of support, at least on EG. Signed-off-by: Aaron Watry <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Modified: libclc/trunk/generic/lib/shared/vload_impl.ll Modified: libclc/trunk/generic/lib/shared/vload_impl.ll URL: http://llvm.org/viewvc/llvm-project/libclc/trunk/generic/lib/shared/vload_impl.ll?rev=188181&r1=188180&r2=188181&view=diff ============================================================================== --- libclc/trunk/generic/lib/shared/vload_impl.ll (original) +++ libclc/trunk/generic/lib/shared/vload_impl.ll Mon Aug 12 09:42:51 2013 @@ -61,6 +61,66 @@ define <16 x i32> @__clc_vload16_i32__ad ret <16 x i32> %2 } +define <2 x i32> @__clc_vload2_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(3)* %addr to <2 x i32> addrspace(3)* + %2 = load <2 x i32> addrspace(3)* %1, align 4, !tbaa !3 + ret <2 x i32> %2 +} + +define <3 x i32> @__clc_vload3_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(3)* %addr to <3 x i32> addrspace(3)* + %2 = load <3 x i32> addrspace(3)* %1, align 4, !tbaa !3 + ret <3 x i32> %2 +} + +define <4 x i32> @__clc_vload4_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(3)* %addr to <4 x i32> addrspace(3)* + %2 = load <4 x i32> addrspace(3)* %1, align 4, !tbaa !3 + ret <4 x i32> %2 +} + +define <8 x i32> @__clc_vload8_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(3)* %addr to <8 x i32> addrspace(3)* + %2 = load <8 x i32> addrspace(3)* %1, align 4, !tbaa !3 + ret <8 x i32> %2 +} + +define <16 x i32> @__clc_vload16_i32__addr3(i32 addrspace(3)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(3)* %addr to <16 x i32> addrspace(3)* + %2 = load <16 x i32> addrspace(3)* %1, align 4, !tbaa !3 + ret <16 x i32> %2 +} + +define <2 x i32> @__clc_vload2_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(4)* %addr to <2 x i32> addrspace(4)* + %2 = load <2 x i32> addrspace(4)* %1, align 4, !tbaa !3 + ret <2 x i32> %2 +} + +define <3 x i32> @__clc_vload3_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(4)* %addr to <3 x i32> addrspace(4)* + %2 = load <3 x i32> addrspace(4)* %1, align 4, !tbaa !3 + ret <3 x i32> %2 +} + +define <4 x i32> @__clc_vload4_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(4)* %addr to <4 x i32> addrspace(4)* + %2 = load <4 x i32> addrspace(4)* %1, align 4, !tbaa !3 + ret <4 x i32> %2 +} + +define <8 x i32> @__clc_vload8_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(4)* %addr to <8 x i32> addrspace(4)* + %2 = load <8 x i32> addrspace(4)* %1, align 4, !tbaa !3 + ret <8 x i32> %2 +} + +define <16 x i32> @__clc_vload16_i32__addr4(i32 addrspace(4)* nocapture %addr) nounwind readonly alwaysinline { + %1 = bitcast i32 addrspace(4)* %addr to <16 x i32> addrspace(4)* + %2 = load <16 x i32> addrspace(4)* %1, align 4, !tbaa !3 + ret <16 x i32> %2 +} + !1 = metadata !{metadata !"char", metadata !5} !2 = metadata !{metadata !"short", metadata !5} !3 = metadata !{metadata !"int", metadata !5} _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
