> I'd be willing to work on the ARM side if you like; if we coordinate > the changes then we could switch Clang over to using the more > natural IR on both ARM and AArch64 simultaneously.
Hmm. I'm meeting some interesting problems in vraddhn and vrsubhn. That large immediate which gets added to perform the rounding gets converted to a lit-pool load in ISelLowering.cpp (at least for the 64-bit variant). There's also the order of the additions to think about: (add (add LHS, RHS), rounding_bit) vs (add (add LHS, rounding_bit), RHS) and so on. I'll press on with the others for now, since I don't see any other looming issues there. Tim. _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
