Rafael Espíndola wrote:
On 4 October 2013 21:04, Nick Lewycky<[email protected]> wrote:
GCC has an x86 feature flag, "-mcx16" which enables support for CMPXCHG16B.
This feature already exists as a feature flag in llvm's x86 backend, but
there is no matching flag in clang (it is automatically enabled/disabled by
-march=). This patch has an llvm part and a clang part that wires up -mcx16
to the existing flag.
One note. There is a discrepancy between clang and gcc on -march= k8-sse3,
opteron-sse3, athlon64-sse3 and amdfam10, where our X86.td claims those
architectures support cmpxchg16b but gcc does not define the relevant macro.
I've gone ahead and made clang define the macro in the same cases that gcc
does, but have not changed which processors claim to support the instruction
in X86.td.
Why not? It is probably better to keep these in sync. In the end, do
you know what is the authoritative source of which amd cpus support
this feature?
Exactly. Why not, because I don't have an authoritative source and
therefore don't know which is right. Or if there's a third option like
the CPUs do support it but with weird problems (extremely slow?) and gcc
deliberately doesn't define the macro for those CPUs. Dunno.
LGTM, but pleas at least open a bug about llvm and gcc not agreeing
about which cpus have this feature.
Okay, I've filed PR17485 and will land the patch as-is. At least this is
the safe direction, where we're not advertising support for a feature
which the backend would support if you used it.
Nick
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