Hi t.p.northover,
http://llvm-reviews.chandlerc.com/D2304
Files:
include/clang/Basic/arm_neon.td
test/CodeGen/aarch64-neon-intrinsics.c
Index: include/clang/Basic/arm_neon.td
===================================================================
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -638,18 +638,18 @@
////////////////////////////////////////////////////////////////////////////////
// saturating absolute/negate
// With additional Qd/Ql type.
-def ABS : SInst<"vabs", "dd", "csifQcQsQiQfQlQd">;
-def QABS : SInst<"vqabs", "dd", "csiQcQsQiQl">;
-def NEG : SOpInst<"vneg", "dd", "csifQcQsQiQfQdQl", OP_NEG>;
-def QNEG : SInst<"vqneg", "dd", "csiQcQsQiQl">;
+def ABS : SInst<"vabs", "dd", "csilfQcQsQiQfQlQd">;
+def QABS : SInst<"vqabs", "dd", "csilQcQsQiQl">;
+def NEG : SOpInst<"vneg", "dd", "csilfQcQsQiQfQdQl", OP_NEG>;
+def QNEG : SInst<"vqneg", "dd", "csilQcQsQiQl">;
////////////////////////////////////////////////////////////////////////////////
// Signed Saturating Accumulated of Unsigned Value
-def SUQADD : SInst<"vuqadd", "ddd", "csiQcQsQiQl">;
+def SUQADD : SInst<"vuqadd", "ddd", "csilQcQsQiQl">;
////////////////////////////////////////////////////////////////////////////////
// Unsigned Saturating Accumulated of Signed Value
-def USQADD : SInst<"vsqadd", "ddd", "UcUsUiQUcQUsQUiQUl">;
+def USQADD : SInst<"vsqadd", "ddd", "UcUsUiUlQUcQUsQUiQUl">;
////////////////////////////////////////////////////////////////////////////////
// Reciprocal/Sqrt
Index: test/CodeGen/aarch64-neon-intrinsics.c
===================================================================
--- test/CodeGen/aarch64-neon-intrinsics.c
+++ test/CodeGen/aarch64-neon-intrinsics.c
@@ -11218,3 +11218,39 @@
// CHECK: fabd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
return vabdd_f64(a, b);
}
+
+int64x1_t test_vuqadd_s64(int64x1_t a, uint64x1_t b) {
+ // CHECK-LABEL: test_vuqadd_s64
+ return vuqadd_s64(a, b);
+ // CHECK: suqadd d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vsqadd_u64(uint64x1_t a, int64x1_t b) {
+ // CHECK-LABEL: test_vsqadd_u64
+ return vsqadd_u64(a, b);
+ // CHECK: usqadd d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vabs_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vabs_s64
+ return vabs_s64(a);
+ // CHECK: abs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vqabs_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vqabs_s64
+ return vqabs_s64(a);
+ // CHECK: sqabs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vqneg_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vqneg_s64
+ return vqneg_s64(a);
+ // CHECK: sqneg d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vneg_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vneg_s64
+ return vneg_s64(a);
+ // CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
+}
Index: include/clang/Basic/arm_neon.td
===================================================================
--- include/clang/Basic/arm_neon.td
+++ include/clang/Basic/arm_neon.td
@@ -638,18 +638,18 @@
////////////////////////////////////////////////////////////////////////////////
// saturating absolute/negate
// With additional Qd/Ql type.
-def ABS : SInst<"vabs", "dd", "csifQcQsQiQfQlQd">;
-def QABS : SInst<"vqabs", "dd", "csiQcQsQiQl">;
-def NEG : SOpInst<"vneg", "dd", "csifQcQsQiQfQdQl", OP_NEG>;
-def QNEG : SInst<"vqneg", "dd", "csiQcQsQiQl">;
+def ABS : SInst<"vabs", "dd", "csilfQcQsQiQfQlQd">;
+def QABS : SInst<"vqabs", "dd", "csilQcQsQiQl">;
+def NEG : SOpInst<"vneg", "dd", "csilfQcQsQiQfQdQl", OP_NEG>;
+def QNEG : SInst<"vqneg", "dd", "csilQcQsQiQl">;
////////////////////////////////////////////////////////////////////////////////
// Signed Saturating Accumulated of Unsigned Value
-def SUQADD : SInst<"vuqadd", "ddd", "csiQcQsQiQl">;
+def SUQADD : SInst<"vuqadd", "ddd", "csilQcQsQiQl">;
////////////////////////////////////////////////////////////////////////////////
// Unsigned Saturating Accumulated of Signed Value
-def USQADD : SInst<"vsqadd", "ddd", "UcUsUiQUcQUsQUiQUl">;
+def USQADD : SInst<"vsqadd", "ddd", "UcUsUiUlQUcQUsQUiQUl">;
////////////////////////////////////////////////////////////////////////////////
// Reciprocal/Sqrt
Index: test/CodeGen/aarch64-neon-intrinsics.c
===================================================================
--- test/CodeGen/aarch64-neon-intrinsics.c
+++ test/CodeGen/aarch64-neon-intrinsics.c
@@ -11218,3 +11218,39 @@
// CHECK: fabd {{d[0-9]+}}, {{d[0-9]+}}, {{d[0-9]+}}
return vabdd_f64(a, b);
}
+
+int64x1_t test_vuqadd_s64(int64x1_t a, uint64x1_t b) {
+ // CHECK-LABEL: test_vuqadd_s64
+ return vuqadd_s64(a, b);
+ // CHECK: suqadd d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+uint64x1_t test_vsqadd_u64(uint64x1_t a, int64x1_t b) {
+ // CHECK-LABEL: test_vsqadd_u64
+ return vsqadd_u64(a, b);
+ // CHECK: usqadd d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vabs_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vabs_s64
+ return vabs_s64(a);
+ // CHECK: abs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vqabs_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vqabs_s64
+ return vqabs_s64(a);
+ // CHECK: sqabs d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vqneg_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vqneg_s64
+ return vqneg_s64(a);
+ // CHECK: sqneg d{{[0-9]+}}, d{{[0-9]+}}
+}
+
+int64x1_t test_vneg_s64(int64x1_t a) {
+ // CHECK-LABEL: test_vneg_s64
+ return vneg_s64(a);
+ // CHECK: neg d{{[0-9]+}}, d{{[0-9]+}}
+}
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