This lets me build the 16-bit startup code of the Linux kernel with clang. If I work around (unrelated) PR3997 it even works.
---
include/clang/Driver/Options.td | 1 +
lib/Driver/Driver.cpp | 12 ++++++++++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/include/clang/Driver/Options.td b/include/clang/Driver/Options.td
index 6682039..5e8a3b8 100644
--- a/include/clang/Driver/Options.td
+++ b/include/clang/Driver/Options.td
@@ -951,6 +951,7 @@ def lazy__framework : Separate<["-"], "lazy_framework">,
Flags<[LinkerInput]>;
def lazy__library : Separate<["-"], "lazy_library">, Flags<[LinkerInput]>;
def EL : Flag<["-"], "EL">, Flags<[DriverOption]>;
def EB : Flag<["-"], "EB">, Flags<[DriverOption]>;
+def m16 : Flag<["-"], "m16">, Group<m_Group>, Flags<[DriverOption,
CoreOption]>;
def m32 : Flag<["-"], "m32">, Group<m_Group>, Flags<[DriverOption,
CoreOption]>;
def mqdsp6_compat : Flag<["-"], "mqdsp6-compat">, Group<m_Group>,
Flags<[DriverOption,CC1Option]>,
HelpText<"Enable hexagon-qdsp6 backward compatibility">;
diff --git a/lib/Driver/Driver.cpp b/lib/Driver/Driver.cpp
index ad938b8..b146666 100644
--- a/lib/Driver/Driver.cpp
+++ b/lib/Driver/Driver.cpp
@@ -1901,12 +1901,20 @@ static llvm::Triple computeTargetTriple(StringRef
DefaultTargetTriple,
return Target;
// Handle pseudo-target flags '-m32' and '-m64'.
- if (Arg *A = Args.getLastArg(options::OPT_m32, options::OPT_m64)) {
+ if (Arg *A = Args.getLastArg(options::OPT_m32, options::OPT_m64,
options::OPT_m16)) {
llvm::Triple::ArchType AT;
if (A->getOption().matches(options::OPT_m32))
AT = Target.get32BitArchVariant().getArch();
- else
+ else if (A->getOption().matches(options::OPT_m64))
AT = Target.get64BitArchVariant().getArch();
+ else if (A->getOption().matches(options::OPT_m16)) {
+ AT = Target.get32BitArchVariant().getArch();
+ if (AT == llvm::Triple::x86)
+ Target.setEnvironment(llvm::Triple::CODE16);
+ else
+ AT = llvm::Triple::UnknownArch;
+ }
+
if (AT != llvm::Triple::UnknownArch)
Target.setArch(AT);
}
--
1.8.4.2
--
David Woodhouse Open Source Technology Centre
[email protected] Intel Corporation
smime.p7s
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