Hi Hao, This patch looks fine. One thing I did notice:
+// CHECK-AArch64-LABEL: test_vsrad_n_u64_2 I don't actually know if FileCheck is case insensitive for CHECK lines, so I don't know if this line is firing? If you could correct the capitalization anyway it LGTM. Cheers, James > -----Original Message----- > From: [email protected] [mailto:cfe-commits- > [email protected]] On Behalf Of Hao Liu > Sent: 14 May 2014 07:51 > To: Hao Liu; [email protected] > Cc: [email protected] > Subject: [PATCH] [ARM64]Scalar right shift uint64_t by 64 generates incorrect > result. > > Hi t.p.northover, > > Hi Tim and other reviewers, > > In the front end CGBuiltin.cpp, we generate incorrect code for scalar right > shift uint64_t by 64, which is incorrectly transferred into "LSR X0, #63". > So when we try to right shift 0xf000000000000000 by 64, the result is 0x1, but > it should be 0x0. > > As according to LLVM reference, the right shift amount of i64 should be [0, > 63], we can't generate such IR like "lshr i64 %tmp, 64". To fix this problem, > this patch just return 0 result when the shift amount is 64. > > Ask for code review. > > Thanks, > -Hao > > http://reviews.llvm.org/D3755 > > Files: > lib/CodeGen/CGBuiltin.cpp > test/CodeGen/aarch64-neon-intrinsics.c http://reviews.llvm.org/D3755 _______________________________________________ cfe-commits mailing list [email protected] http://lists.cs.uiuc.edu/mailman/listinfo/cfe-commits
