carwil updated this revision to Diff 181766.
carwil set the repository for this revision to rC Clang.
carwil added a comment.
Herald added a subscriber: cfe-commits.
Added cfe-commits.
Repository:
rC Clang
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D56003/new/
https://reviews.llvm.org/D56003
Files:
docs/ClangCommandLineReference.rst
include/clang/Driver/Options.td
lib/Basic/Targets/ARM.cpp
lib/Basic/Targets/ARM.h
lib/Driver/ToolChains/Arch/ARM.cpp
test/Driver/arm-reserved-regs.c
test/Sema/arm-global-regs.c
Index: test/Sema/arm-global-regs.c
===================================================================
--- /dev/null
+++ test/Sema/arm-global-regs.c
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 -ffreestanding -fsyntax-only -verify -triple arm %s
+
+// Check a small subset of valid and invalid global register variable declarations.
+
+register unsigned arm_r3 __asm("r3"); //expected-error {{register 'r3' unsuitable for global register variables on this target}}
+
+register unsigned arm_r12 __asm("r12"); //expected-error {{register 'r12' unsuitable for global register variables on this target}}
+
+register unsigned arm_r5 __asm("r5");
+
+register unsigned arm_r9 __asm("r9");
+
+register unsigned arm_sp __asm("sp");
\ No newline at end of file
Index: test/Driver/arm-reserved-regs.c
===================================================================
--- /dev/null
+++ test/Driver/arm-reserved-regs.c
@@ -0,0 +1,11 @@
+// RUN: %clang -target arm-arm-none-eabi -### -ffixed-r11 -c %s 2>&1 | FileCheck -check-prefix=CHECK-NO-RESERVED-FRAME-POINTER %s
+// CHECK-NO-RESERVED-FRAME-POINTER: option '-ffixed-r11' cannot be specified without '-fomit-frame-pointer'
+
+// RUN: %clang -target arm-arm-none-eabi -### -ffixed-r7 -mthumb -c %s 2>&1 | FileCheck -check-prefix=CHECK-NO-RESERVED-FRAME-POINTER-THUMB %s
+// CHECK-NO-RESERVED-FRAME-POINTER-THUMB: option '-ffixed-r7' cannot be specified without '-fomit-frame-pointer'
+
+// RUN: %clang -target arm-arm-none-eabi -### -ffixed-r11 -fomit-frame-pointer -c %s 2>&1 | FileCheck -check-prefix=CHECK-RESERVED-NO-FRAME-POINTER %s
+// CHECK-RESERVED-NO-FRAME-POINTER-NOT: option '-ffixed-r11' cannot be specified without '-fomit-frame-pointer'
+
+// RUN: %clang -target arm-arm-none-eabi -### -ffixed-r7 -mthumb -fomit-frame-pointer -c %s 2>&1 | FileCheck -check-prefix=CHECK-RESERVED-NO-FRAME-POINTER-THUMB %s
+// CHECK-RESERVED-NO-FRAME-POINTER-THUMB-NOT: option '-ffixed-r7' cannot be specified without '-fomit-frame-pointer'
\ No newline at end of file
Index: lib/Driver/ToolChains/Arch/ARM.cpp
===================================================================
--- lib/Driver/ToolChains/Arch/ARM.cpp
+++ lib/Driver/ToolChains/Arch/ARM.cpp
@@ -548,11 +548,42 @@
Features.push_back("+strict-align");
}
- // llvm does not support reserving registers in general. There is support
- // for reserving r9 on ARM though (defined as a platform-specific register
- // in ARM EABI).
- if (Args.hasArg(options::OPT_ffixed_r9))
- Features.push_back("+reserve-r9");
+ // Do not allow r9 reservation with -frwpi.
+ if (Args.hasArg(options::OPT_ffixed_r9) && Args.hasArg(options::OPT_frwpi)) {
+ Arg *A = Args.getLastArg(options::OPT_ffixed_r9);
+ Arg *B = Args.getLastArg(options::OPT_frwpi);
+ D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
+ }
+
+ // Do not allow fp reservation unless it's been explicity omitted.
+ if (!Args.hasArg(options::OPT_fomit_frame_pointer) ||
+ Args.hasArg(options::OPT_fno_omit_frame_pointer)) {
+ if (Triple.isOSDarwin() || (!Triple.isOSWindows() && Triple.isThumb())) {
+ if (Args.hasArg(options::OPT_ffixed_r7)) {
+ Arg *A = Args.getLastArg(options::OPT_ffixed_r7);
+ D.Diag(diag::err_opt_not_valid_without_opt) << A->getAsString(Args)
+ << "-fomit-frame-pointer"
+ << " or with -fno-omit-frame-pointer.";
+ }
+ } else if (Args.hasArg(options::OPT_ffixed_r11)) {
+ Arg *A = Args.getLastArg(options::OPT_ffixed_r11);
+ D.Diag(diag::err_opt_not_valid_without_opt) << A->getAsString(Args)
+ << "-fomit-frame-pointer"
+ << " or with -fno-omit-frame-pointer.";
+ }
+ }
+
+// Reservation of general purpose registers.
+#define HANDLE_FFIXED_R(n) \
+ if (Args.hasArg(options::OPT_ffixed_r##n)) \
+ Features.push_back("+reserve-r" #n)
+ HANDLE_FFIXED_R(5);
+ HANDLE_FFIXED_R(6);
+ HANDLE_FFIXED_R(7);
+ HANDLE_FFIXED_R(8);
+ HANDLE_FFIXED_R(9);
+ HANDLE_FFIXED_R(10);
+ HANDLE_FFIXED_R(11);
// The kext linker doesn't know how to deal with movw/movt.
if (KernelOrKext || Args.hasArg(options::OPT_mno_movt))
Index: lib/Basic/Targets/ARM.h
===================================================================
--- lib/Basic/Targets/ARM.h
+++ lib/Basic/Targets/ARM.h
@@ -148,6 +148,9 @@
ArrayRef<const char *> getGCCRegNames() const override;
ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
+ bool validateGlobalRegisterVariable(StringRef RegName,
+ unsigned RegSize,
+ bool &HasSizeMismatch) const override;
bool validateAsmConstraint(const char *&Name,
TargetInfo::ConstraintInfo &Info) const override;
std::string convertConstraint(const char *&Constraint) const override;
Index: lib/Basic/Targets/ARM.cpp
===================================================================
--- lib/Basic/Targets/ARM.cpp
+++ lib/Basic/Targets/ARM.cpp
@@ -823,6 +823,22 @@
return llvm::makeArrayRef(GCCRegAliases);
}
+bool ARMTargetInfo::validateGlobalRegisterVariable(
+ StringRef RegName, unsigned RegSize, bool &HasSizeMismatch) const {
+ if (RegName.equals("r5") ||
+ RegName.equals("r6") ||
+ RegName.equals("r7") ||
+ RegName.equals("r8") ||
+ RegName.equals("r9") ||
+ RegName.equals("r10") ||
+ RegName.equals("r11") ||
+ RegName.equals("sp")) {
+ HasSizeMismatch = false;
+ return true;
+ }
+ return false;
+}
+
bool ARMTargetInfo::validateAsmConstraint(
const char *&Name, TargetInfo::ConstraintInfo &Info) const {
switch (*Name) {
Index: include/clang/Driver/Options.td
===================================================================
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -2112,8 +2112,9 @@
def mno_restrict_it: Flag<["-"], "mno-restrict-it">, Group<m_arm_Features_Group>,
HelpText<"Allow generation of deprecated IT blocks for ARMv8. It is off by default for ARMv8 Thumb mode">;
def marm : Flag<["-"], "marm">, Alias<mno_thumb>;
-def ffixed_r9 : Flag<["-"], "ffixed-r9">, Group<m_arm_Features_Group>,
- HelpText<"Reserve the r9 register (ARM only)">;
+foreach i = {5-11} in
+ def ffixed_r#i : Flag<["-"], "ffixed-r"#i>, Group<m_arm_Features_Group>,
+ HelpText<"Reserve the r"#i#" register (ARM only)">;
def mno_movt : Flag<["-"], "mno-movt">, Group<m_arm_Features_Group>,
HelpText<"Disallow use of movt/movw pairs (ARM only)">;
def mcrc : Flag<["-"], "mcrc">, Group<m_Group>,
Index: docs/ClangCommandLineReference.rst
===================================================================
--- docs/ClangCommandLineReference.rst
+++ docs/ClangCommandLineReference.rst
@@ -2402,10 +2402,34 @@
ARM
---
+.. option:: -ffixed-r5
+
+Reserve the r5 register (ARM only)
+
+.. option:: -ffixed-r6
+
+Reserve the r6 register (ARM only)
+
+.. option:: -ffixed-r7
+
+Reserve the r7 register (ARM only)
+
+.. option:: -ffixed-r8
+
+Reserve the r8 register (ARM only)
+
.. option:: -ffixed-r9
Reserve the r9 register (ARM only)
+.. option:: -ffixed-r10
+
+Reserve the r10 register (ARM only)
+
+.. option:: -ffixed-r11
+
+Reserve the r11 register (ARM only)
+
.. option:: -mexecute-only, -mno-execute-only, -mpure-code
Disallow generation of data access to code sections (ARM only)
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
