JamesNagurne added a comment.
Hi Simon et. al., I'm working on a downstream ARM toolchain and have
downstreamed this change into our codebase.
We saw that you've fixed the -mfpu=none issue and have taken that as well, but
are still running into some issues.
Prior to your change, the optionset "-mcpu=cortex-m4 -mfloat-abi=hard" created
the following target features in the LLVM IR coming out of clang:
"target-features"="+armv7e-m,+d16,+dsp,+fp-only-sp,+hwdiv,+thumb-mode,+vfp4,-crc,-dotprod,-fp16fml,-hwdiv-arm,-ras"
In specific, note the +d16, +fp-only-sp.
After your changes, we're not seeing the associated -d32, -fp64 target features:
"target-cpu"="cortex-m4"
"target-features"="+armv7e-m,+dsp,+hwdiv,+thumb-mode,+vfp4,-crc,-dotprod,-fp16fml,-hwdiv-arm,-ras"
As a result, we are getting linktime failures between our libraries, which use
"-mcpu=cortex-m4 -mfloat-abi=hard", and our tests, which specifically call out
the FPU version being used.
An interesting note is that the target machine table has the following:
def : ProcessorModel<"cortex-m4", CortexM4Model, [ARMv7em,
FeatureVFP4_D16_SP,
FeaturePrefLoopAlign32,
FeatureHasSlowFPVMLx,
FeatureUseMISched,
FeatureUseAA,
FeatureHasNoBranchPredictor]>;
Would this not mean that we'd expect vfp4-d16-sp when not otherwise specified?
If not, then what is the expected behavior of -mfloat-abi=hard in the absence
of an -mfpu specification?
Thanks,
J.B. Nagurne
Texas Instruments
Code Generation
Repository:
rC Clang
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D60691/new/
https://reviews.llvm.org/D60691
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