dmgreen added inline comments.
================
Comment at: llvm/lib/Target/ARM/ARMInstrMVE.td:3645
+ Intrinsic pred_int, bit round> {
+ def "" : MVE_VxMULH<iname, VTI.Suffix, VTI.Unsigned, round, VTI.Size>;
+
----------------
Should this be `VTI.Suffix, VTI.Unsigned, VTI.Size, round` now?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D70948/new/
https://reviews.llvm.org/D70948
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
