shiva0217 added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:289
unsigned CFIIndex = MF.addFrameInst(
MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize));
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
----------------
Should the -StackSize be -RealStackSize?
================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:667
+ .addExternalSymbol(SpillLibCall, RISCVII::MO_CALL)
+ .setMIFlag(MachineInstr::FrameSetup);
+
----------------
There is a case may trigger an assertion when compile with -O3 -g
-msave-restore if the libcall has FrameSetup flag.
int main(int a, char* argv[]) {
exit(0);
return 0;
}
================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:668
+ .setMIFlag(MachineInstr::FrameSetup);
+
+ // Add registers spilled in libcall as liveins.
----------------
GCC will generate stack adjustment and GPR callee saved CFIs for the save
libcalls. Should we do the same?
================
Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.h:40
+ bool hasReservedSpillSlot(const MachineFunction &MF, unsigned Reg,
+ int &FrameIdx) const override;
----------------
An alternative of defining hasReservedSpillSlot could be set SaveRegs for the
registers will be pushed by the libcalls in determineCalleeSaves. So the
StackSize calculation will take the callee saved registers will be pushed by
the libcalls into account.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D62686/new/
https://reviews.llvm.org/D62686
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