dsanders added a subscriber: dsanders. ================ Comment at: test/Preprocessor/init.c:3295 @@ +3294,3 @@ +// MIPSN32BE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1 +// MIPSN32BE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 1 +// MIPSN32BE-NOT: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 ---------------- I've just noticed that we only check the '__GCC_*' macros for the 64-bit ABI's (N32/N64). I'm not sure why the 32-bit (O32) checks are missing.
The O32 cases are the same as N32 except that `__GCC_ATOMIC_LLONG_LOCK_FREE` is 1 and `__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8` is not defined. Could you add: // MIPS32LE: #define __GCC_ATOMIC_BOOL_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_CHAR16_T_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_CHAR32_T_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_CHAR_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_INT_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_LLONG_LOCK_FREE 1 // MIPS32LE: #define __GCC_ATOMIC_LONG_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_POINTER_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_SHORT_LOCK_FREE 2 // MIPS32LE: #define __GCC_ATOMIC_TEST_AND_SET_TRUEVAL 1 // MIPS32LE: #define __GCC_ATOMIC_WCHAR_T_LOCK_FREE 2 // MIPS32LE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_1 1 // MIPS32LE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_2 1 // MIPS32LE: #define __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 1 // MIPS32LE-NOT: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 // MIPS32LE-NOT: __GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 and the same for the MIPS32BE case? http://reviews.llvm.org/D17933 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits