craig.topper added inline comments.
================ Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:3896 + // encoder. Prefixes |= X86::IP_USE_VEX3; + Prefixes |= X86::Force_VEX3Encoding; ---------------- Why do we need Force_VEX3Encoding and IP_USE_VEX3? ================ Comment at: llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h:67 + IP_USE_DISP32 = 1U << 8, + Force_VEXEncoding = 1U << 9, + Force_VEX2Encoding = 1U << 10, ---------------- Why don't these start with IP_? ================ Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:354 + else if (Flags & X86::Force_VEX2Encoding) + O << "\t{vex2}"; + else if (Flags & X86::Force_VEX3Encoding) ---------------- Is it important that we use {vex2} instead of just treating it as {vex}? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D90009/new/ https://reviews.llvm.org/D90009 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits