mehdi_amini added a comment. (Drive by comments)
================ Comment at: llvm/include/llvm/CodeGen/TileShapeInfo.h:27 + +class ShapeT { +public: ---------------- Can you document the class? ================ Comment at: llvm/lib/Target/X86/X86PreTileConfig.cpp:30 + +class X86PreTileConfig : public MachineFunctionPass { + // context ---------------- Can you document this as well? ================ Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:34 + +class X86TileConfig : public MachineFunctionPass { + // context ---------------- Can you document this pass? ================ Comment at: llvm/lib/Target/X86/X86TileConfig.cpp:223 + LLVM_DEBUG(dbgs() << "********** TILE REGISTER CONFIGURE**********\n" + << "********** Function: " << mf.getName() << '\n'); + MF = &mf; ---------------- Is this usual for MachinePasses to do this? In general the pass manager can display the scheduling when debugging Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D87981/new/ https://reviews.llvm.org/D87981 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits