MarkMurrayARM added inline comments.
================ Comment at: llvm/lib/Target/AArch64/AArch64.td:673-686 +def ProcA78C : SubtargetFeature<"cortex-a78c", "ARMProcFamily", + "CortexA78C", + "Cortex-A78C ARM processors", [ + HasV8_2aOps, + FeatureCrypto, + FeatureFPARMv8, + FeatureFuseAES, ---------------- ktkachov wrote: > According to the TRM at https://developer.arm.com/documentation/102226/0001 > Cortex-A78C also supports Pointer Authetication and the Flag Manipulation > instructions as well (CFINV, RMIF etc). I think this feature set doesn't > reflect that? ktkachov: FeaturePA? ================ Comment at: llvm/unittests/Support/TargetParserTest.cpp:833 + } + } pass &= AArch64::getCPUAttr(AK).equals(CPUAttr); ---------------- DavidSpickett wrote: > I assume this was left in from debugging, if not it should be its own change. > (considering this file is already using gtest, you could refactor to > ASSERT_EQ the flags and get the messages for free) I like the idea of ASSERT_EQ, but I need the numbers to be in hex. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D93022/new/ https://reviews.llvm.org/D93022 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
