zoecarver added a comment. > We could probably do something like what this patch is doing and determine > whether a class can be passed in registers based on whether its subobjects > can be passed in registers. If all of the subobjects can be passed in > registers, the current class can be passed in registers too unless something > declared in the current class forces it to be passed indirectly (e.g., a > virtual function is declared).
That's where I'm getting confused because on main both `B0` and `B1` are passed directly, so why isn't `D` also getting passed directly? There's nothing declared in that class other than the two members. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D92361/new/ https://reviews.llvm.org/D92361 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits