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This patch is in a series of patches to provide builtins for
compatability with the XL compiler. This patch adds builtins for compare
exponent and test data class operations on floating point values.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D109437
Files:
clang/include/clang/Basic/BuiltinsPPC.def
clang/include/clang/Basic/DiagnosticSemaKinds.td
clang/lib/Basic/Targets/PPC.cpp
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/builtins-ppc-xlcompat-pwr9-error.c
clang/test/CodeGen/builtins-ppc-xlcompat-test.c
llvm/include/llvm/IR/IntrinsicsPowerPC.td
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-test.ll
Index: llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-test.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-test.ll
@@ -0,0 +1,99 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-unknown \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
+; RUN: -mcpu=pwr9 < %s | FileCheck %s
+
+define i32 @test_builtin_ppc_compare_exp_eq(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_eq:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscmpexpdp 0, 1, 1
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: iseleq 3, 4, 3
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call i32 @llvm.ppc.compare.exp.eq(double %d, double %d)
+ ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.eq(double, double)
+
+define i32 @test_builtin_ppc_compare_exp_lt(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_lt:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscmpexpdp 0, 1, 1
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: isellt 3, 4, 3
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call i32 @llvm.ppc.compare.exp.lt(double %d, double %d)
+ ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.lt(double, double)
+
+define i32 @test_builtin_ppc_compare_exp_gt(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_gt:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscmpexpdp 0, 1, 1
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: iselgt 3, 4, 3
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call i32 @llvm.ppc.compare.exp.gt(double %d, double %d)
+ ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.gt(double, double)
+
+define i32 @test_builtin_ppc_compare_exp_uo(double %d) {
+; CHECK-LABEL: test_builtin_ppc_compare_exp_uo:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscmpexpdp 0, 1, 1
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: isel 3, 4, 3, 3
+; CHECK-NEXT: blr
+entry:
+ %0 = tail call i32 @llvm.ppc.compare.exp.uo(double %d, double %d)
+ ret i32 %0
+}
+
+declare i32 @llvm.ppc.compare.exp.uo(double, double)
+
+define i32 @test_builtin_ppc_test_data_class_d(double %d) {
+; CHECK-LABEL: test_builtin_ppc_test_data_class_d:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xststdcdp 0, 1, 0
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: iseleq 3, 4, 3
+; CHECK-NEXT: blr
+entry:
+ %test_data_class = tail call i32 @llvm.ppc.test.data.class.d(double %d, i32 0)
+ ret i32 %test_data_class
+}
+
+declare i32 @llvm.ppc.test.data.class.d(double, i32 immarg)
+
+define i32 @test_builtin_ppc_test_data_class_f(float %f) {
+; CHECK-LABEL: test_builtin_ppc_test_data_class_f:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xststdcsp 0, 1, 127
+; CHECK-NEXT: li 3, 0
+; CHECK-NEXT: li 4, 1
+; CHECK-NEXT: iseleq 3, 4, 3
+; CHECK-NEXT: blr
+entry:
+ %test_data_class = tail call i32 @llvm.ppc.test.data.class.f(float %f, i32 127)
+ ret i32 %test_data_class
+}
+
+declare i32 @llvm.ppc.test.data.class.f(float, i32 immarg)
Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -10382,6 +10382,50 @@
}
return DAG.getMergeValues(RetOps, dl);
}
+ case Intrinsic::ppc_compare_exp_lt:
+ case Intrinsic::ppc_compare_exp_gt:
+ case Intrinsic::ppc_compare_exp_eq:
+ case Intrinsic::ppc_compare_exp_uo:
+ case Intrinsic::ppc_test_data_class_d:
+ case Intrinsic::ppc_test_data_class_f: {
+ unsigned CmprOpc = PPC::XSCMPEXPDP;
+ SDValue Op1 = Op.getOperand(1);
+ SDValue Op2 = Op.getOperand(2);
+ unsigned Pred;
+ switch (IntrinsicID) {
+ default:
+ llvm_unreachable("Unknown Intrinsic");
+ case Intrinsic::ppc_compare_exp_lt:
+ Pred = PPC::PRED_LT;
+ break;
+ case Intrinsic::ppc_compare_exp_gt:
+ Pred = PPC::PRED_GT;
+ break;
+ case Intrinsic::ppc_compare_exp_eq:
+ Pred = PPC::PRED_EQ;
+ break;
+ case Intrinsic::ppc_compare_exp_uo:
+ Pred = PPC::PRED_UN;
+ break;
+ case Intrinsic::ppc_test_data_class_d:
+ CmprOpc = PPC::XSTSTDCDP;
+ Op1 = Op.getOperand(2);
+ Op2 = Op.getOperand(1);
+ Pred = PPC::PRED_EQ;
+ break;
+ case Intrinsic::ppc_test_data_class_f:
+ CmprOpc = PPC::XSTSTDCSP;
+ Op1 = Op.getOperand(2);
+ Op2 = Op.getOperand(1);
+ Pred = PPC::PRED_EQ;
+ break;
+ }
+ SDValue Ops[]{
+ SDValue(DAG.getMachineNode(CmprOpc, dl, MVT::i32, Op1, Op2), 0),
+ DAG.getConstant(1, dl, MVT::i32), DAG.getConstant(0, dl, MVT::i32),
+ DAG.getTargetConstant(Pred, dl, MVT::i32)};
+ return SDValue(DAG.getMachineNode(PPC::SELECT_CC_I4, dl, MVT::i32, Ops), 0);
+ }
}
// If this is a lowered altivec predicate compare, CompareOpc is set to the
Index: llvm/include/llvm/IR/IntrinsicsPowerPC.td
===================================================================
--- llvm/include/llvm/IR/IntrinsicsPowerPC.td
+++ llvm/include/llvm/IR/IntrinsicsPowerPC.td
@@ -1720,6 +1720,28 @@
Intrinsic<[llvm_double_ty], [llvm_double_ty], [IntrNoMem]>;
def int_ppc_frsqrtes : GCCBuiltin<"__builtin_ppc_frsqrtes">,
Intrinsic<[llvm_float_ty], [llvm_float_ty], [IntrNoMem]>;
+ def int_ppc_compare_exp_uo : GCCBuiltin<"__builtin_ppc_compare_exp_uo">,
+ Intrinsic<[llvm_i32_ty],
+ [llvm_double_ty, llvm_double_ty],
+ [IntrNoMem]>;
+ def int_ppc_compare_exp_lt : GCCBuiltin<"__builtin_ppc_compare_exp_lt">,
+ Intrinsic<[llvm_i32_ty],
+ [llvm_double_ty, llvm_double_ty],
+ [IntrNoMem]>;
+ def int_ppc_compare_exp_gt : GCCBuiltin<"__builtin_ppc_compare_exp_gt">,
+ Intrinsic<[llvm_i32_ty],
+ [llvm_double_ty, llvm_double_ty],
+ [IntrNoMem]>;
+ def int_ppc_compare_exp_eq : GCCBuiltin<"__builtin_ppc_compare_exp_eq">,
+ Intrinsic<[llvm_i32_ty],
+ [llvm_double_ty, llvm_double_ty],
+ [IntrNoMem]>;
+ def int_ppc_test_data_class_d : Intrinsic<[llvm_i32_ty],
+ [llvm_double_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<1>>]>;
+ def int_ppc_test_data_class_f : Intrinsic<[llvm_i32_ty],
+ [llvm_float_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<1>>]>;
}
//===----------------------------------------------------------------------===//
Index: clang/test/CodeGen/builtins-ppc-xlcompat-test.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/builtins-ppc-xlcompat-test.c
@@ -0,0 +1,124 @@
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm %s \
+// RUN: -target-cpu pwr9 -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown -emit-llvm %s \
+// RUN: -target-cpu pwr9 -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
+// RUN: -target-cpu pwr9 -o - | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix %s -emit-llvm %s \
+// RUN: -target-cpu pwr9 -o - | FileCheck %s
+// RUN: not %clang_cc1 -triple powerpc64-unknown-unknown -emit-llvm-only %s \
+// RUN: -target-cpu pwr8 2>&1 | FileCheck %s --check-prefix=CHECK-NONPWR9-ERR
+// RUN: not %clang_cc1 -target-feature -vsx -triple powerpc64-unknown-unknown -emit-llvm-only %s \
+// RUN: -target-cpu pwr9 2>&1 | FileCheck %s --check-prefix=CHECK-NOVSX-ERR
+
+extern double d;
+extern float f;
+
+int test_builtin_ppc_compare_exp_uo() {
+// CHECK-LABEL: @test_builtin_ppc_compare_exp_uo
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.uo(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __builtin_ppc_compare_exp_uo(d, d);
+}
+
+int test_builtin_ppc_compare_exp_lt() {
+// CHECK-LABEL: @test_builtin_ppc_compare_exp_lt
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.lt(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __builtin_ppc_compare_exp_lt(d, d);
+}
+
+int test_builtin_ppc_compare_exp_gt() {
+// CHECK-LABEL: @test_builtin_ppc_compare_exp_gt
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.gt(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __builtin_ppc_compare_exp_gt(d, d);
+}
+
+int test_builtin_ppc_compare_exp_eq() {
+// CHECK-LABEL: @test_builtin_ppc_compare_exp_eq
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.eq(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __builtin_ppc_compare_exp_eq(d, d);
+}
+
+int test_builtin_ppc_test_data_class_d() {
+// CHECK-LABEL: @test_builtin_ppc_test_data_class_d
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.d(double %0, i32 0)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __builtin_ppc_test_data_class(d, 0);
+}
+
+int test_builtin_ppc_test_data_class_f() {
+// CHECK-LABEL: @test_builtin_ppc_test_data_class_f
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.f(float %0, i32 0)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __builtin_ppc_test_data_class(f, 0);
+}
+
+int test_compare_exp_uo() {
+// CHECK-LABEL: @test_compare_exp_uo
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.uo(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __compare_exp_uo(d, d);
+}
+
+int test_compare_exp_lt() {
+// CHECK-LABEL: @test_compare_exp_lt
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.lt(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __compare_exp_lt(d, d);
+}
+
+int test_compare_exp_gt() {
+// CHECK-LABEL: @test_compare_exp_gt
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.gt(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __compare_exp_gt(d, d);
+}
+
+int test_compare_exp_eq() {
+// CHECK-LABEL: @test_compare_exp_eq
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.compare.exp.eq(double %0, double %1)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __compare_exp_eq(d, d);
+}
+
+int test_test_data_class_d() {
+// CHECK-LABEL: @test_test_data_class_d
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.d(double %0, i32 127)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __test_data_class(d, 127);
+}
+
+int test_test_data_class_f() {
+// CHECK-LABEL: @test_test_data_class_f
+// CHECK: [[TMP:%.*]] = call i32 @llvm.ppc.test.data.class.f(float %0, i32 127)
+// CHECK-NEXT: ret i32 [[TMP]]
+// CHECK-NONPWR9-ERR: error: this builtin is only valid on POWER9 or later CPUs
+// CHECK-NOVSX-ERR: error: this builtin requires VSX to be enabled
+ return __test_data_class(f, 127);
+}
Index: clang/test/CodeGen/builtins-ppc-xlcompat-pwr9-error.c
===================================================================
--- clang/test/CodeGen/builtins-ppc-xlcompat-pwr9-error.c
+++ clang/test/CodeGen/builtins-ppc-xlcompat-pwr9-error.c
@@ -11,6 +11,8 @@
extern unsigned int ui;
extern unsigned long long ull;
extern long long ll;
+extern float f;
+extern double d;
void test_builtin_ppc_cmprb() {
int res = __builtin_ppc_cmprb(3, ui, ui); // expected-error {{argument value 3 is outside the valid range [0, 1]}}
@@ -24,3 +26,19 @@
}
#endif
+
+int test_builtin_ppc_test_data_class_d() {
+ return __builtin_ppc_test_data_class(d, -1); // expected-error {{argument value -1 is outside the valid range [0, 127]}}
+}
+
+int test_builtin_ppc_test_data_class_f() {
+ return __builtin_ppc_test_data_class(f, -1); // expected-error {{argument value -1 is outside the valid range [0, 127]}}
+}
+
+int test_test_data_class_d() {
+ return __test_data_class(d, 128); // expected-error {{argument value 128 is outside the valid range [0, 127]}}
+}
+
+int test_test_data_class_f() {
+ return __test_data_class(f, 128); // expected-error {{argument value 128 is outside the valid range [0, 127]}}
+}
Index: clang/lib/Sema/SemaChecking.cpp
===================================================================
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -3473,6 +3473,20 @@
return SemaFeatureCheck(*this, TheCall, "isa-v207-instructions",
diag::err_ppc_builtin_only_on_arch, "8") ||
SemaBuiltinConstantArgRange(TheCall, 1, 1, 16);
+ case PPC::BI__builtin_ppc_compare_exp_uo:
+ case PPC::BI__builtin_ppc_compare_exp_lt:
+ case PPC::BI__builtin_ppc_compare_exp_gt:
+ case PPC::BI__builtin_ppc_compare_exp_eq:
+ return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+ diag::err_ppc_builtin_only_on_arch, "9") ||
+ SemaFeatureCheck(*this, TheCall, "vsx",
+ diag::err_ppc_builtin_requires_vsx);
+ case PPC::BI__builtin_ppc_test_data_class:
+ return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
+ diag::err_ppc_builtin_only_on_arch, "9") ||
+ SemaFeatureCheck(*this, TheCall, "vsx",
+ diag::err_ppc_builtin_requires_vsx) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 127);
#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
case PPC::BI__builtin_##Name: \
return SemaBuiltinPPCMMACall(TheCall, Types);
Index: clang/lib/CodeGen/CGBuiltin.cpp
===================================================================
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -16035,6 +16035,21 @@
*this, E, Intrinsic::sqrt,
Intrinsic::experimental_constrained_sqrt))
.getScalarVal();
+ case PPC::BI__builtin_ppc_test_data_class:
+ Value *ArgValue = EmitScalarExpr(E->getArg(0));
+ llvm::Type *ArgType = ArgValue->getType();
+ unsigned Int;
+ if (ArgType->isDoubleTy()) {
+ Int = Intrinsic::ppc_test_data_class_d;
+ } else if (ArgType->isFloatTy()) {
+ Int = Intrinsic::ppc_test_data_class_f;
+ } else {
+ assert(false && "First arg to __builtin_ppc_test_data_class must be a "
+ "float or double");
+ llvm_unreachable("Invalid Argument Type");
+ }
+ Function *F = CGM.getIntrinsic(Int);
+ return Builder.CreateCall(F, Ops, "test_data_class");
}
}
Index: clang/lib/Basic/Targets/PPC.cpp
===================================================================
--- clang/lib/Basic/Targets/PPC.cpp
+++ clang/lib/Basic/Targets/PPC.cpp
@@ -238,6 +238,11 @@
Builder.defineMacro("__fsqrts", "__builtin_ppc_fsqrts");
Builder.defineMacro("__addex", "__builtin_ppc_addex");
Builder.defineMacro("__cmplxl", "__builtin_complex");
+ Builder.defineMacro("__compare_exp_uo", "__builtin_ppc_compare_exp_uo");
+ Builder.defineMacro("__compare_exp_lt", "__builtin_ppc_compare_exp_lt");
+ Builder.defineMacro("__compare_exp_gt", "__builtin_ppc_compare_exp_gt");
+ Builder.defineMacro("__compare_exp_eq", "__builtin_ppc_compare_exp_eq");
+ Builder.defineMacro("__test_data_class", "__builtin_ppc_test_data_class");
}
/// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
Index: clang/include/clang/Basic/DiagnosticSemaKinds.td
===================================================================
--- clang/include/clang/Basic/DiagnosticSemaKinds.td
+++ clang/include/clang/Basic/DiagnosticSemaKinds.td
@@ -11358,4 +11358,7 @@
"builtin requires '%0' extension support to be enabled">;
def err_riscv_builtin_invalid_lmul : Error<
"LMUL argument must be in the range [0,3] or [5,7]">;
+
+def err_ppc_builtin_requires_vsx : Error<
+ "this builtin requires VSX to be enabled">;
} // end of sema component.
Index: clang/include/clang/Basic/BuiltinsPPC.def
===================================================================
--- clang/include/clang/Basic/BuiltinsPPC.def
+++ clang/include/clang/Basic/BuiltinsPPC.def
@@ -96,6 +96,11 @@
BUILTIN(__builtin_ppc_swdivs_nochk, "fff", "")
BUILTIN(__builtin_ppc_alignx, "vIivC*", "nc")
BUILTIN(__builtin_ppc_rdlam, "UWiUWiUWiUWIi", "nc")
+BUILTIN(__builtin_ppc_compare_exp_uo, "idd", "")
+BUILTIN(__builtin_ppc_compare_exp_lt, "idd", "")
+BUILTIN(__builtin_ppc_compare_exp_gt, "idd", "")
+BUILTIN(__builtin_ppc_compare_exp_eq, "idd", "")
+BUILTIN(__builtin_ppc_test_data_class, "idIi", "t")
// Compare
BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "")
BUILTIN(__builtin_ppc_cmprb, "iCIiii", "")
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