Author: Kévin Petit Date: 2022-01-13T09:28:19Z New Revision: ec0a880d54632923b4d0742f38d565830fc0d0e0
URL: https://github.com/llvm/llvm-project/commit/ec0a880d54632923b4d0742f38d565830fc0d0e0 DIFF: https://github.com/llvm/llvm-project/commit/ec0a880d54632923b4d0742f38d565830fc0d0e0.diff LOG: libclc: Add clspv64 target Add a variant of the clspv target that is built using spir64. This is a pre-requisite to supporting spir64 in clspv which is required to take advantage of SPV_KHR_physical_storage_buffer which in turn enables more OpenCL C programs to be compiled with clspv. https://reviews.llvm.org/D116668 Added: libclc/clspv64 Modified: libclc/CMakeLists.txt Removed: ################################################################################ diff --git a/libclc/CMakeLists.txt b/libclc/CMakeLists.txt index e90e0fd852012..9773b2cc925ff 100644 --- a/libclc/CMakeLists.txt +++ b/libclc/CMakeLists.txt @@ -8,6 +8,7 @@ set_property(DIRECTORY APPEND PROPERTY CMAKE_CONFIGURE_DEPENDS amdgcn-mesa3d/lib/SOURCES; amdgpu/lib/SOURCES; clspv/lib/SOURCES; + clspv64/lib/SOURCES; generic/lib/SOURCES; ptx/lib/SOURCES; ptx-nvidiacl/lib/SOURCES; @@ -21,6 +22,7 @@ set( LIBCLC_TARGETS_ALL amdgcn-- amdgcn--amdhsa clspv-- + clspv64-- r600-- nvptx-- nvptx64-- @@ -156,6 +158,7 @@ set( amdgcn--_devices tahiti ) set( amdgcn-mesa-mesa3d_devices ${amdgcn--_devices} ) set( amdgcn--amdhsa_devices none ) set( clspv--_devices none ) +set( clspv64--_devices none ) set( nvptx--_devices none ) set( nvptx64--_devices none ) set( nvptx--nvidiacl_devices none ) @@ -214,7 +217,8 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} ) set( dirs ) - if ( NOT ${ARCH} STREQUAL spirv AND NOT ${ARCH} STREQUAL spirv64 AND NOT ${ARCH} STREQUAL clspv ) + if ( NOT ${ARCH} STREQUAL spirv AND NOT ${ARCH} STREQUAL spirv64 AND + NOT ${ARCH} STREQUAL clspv AND NOT ${ARCH} STREQUAL clspv64) LIST( APPEND dirs generic ) endif() @@ -245,7 +249,8 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} ) # Add the generated convert.cl here to prevent adding # the one listed in SOURCES - if( NOT ${ARCH} STREQUAL "spirv" AND NOT ${ARCH} STREQUAL "spirv64" AND NOT ${ARCH} STREQUAL "clspv" ) + if( NOT ${ARCH} STREQUAL "spirv" AND NOT ${ARCH} STREQUAL "spirv64" AND + NOT ${ARCH} STREQUAL "clspv" AND NOT ${ARCH} STREQUAL "clspv64" ) set( rel_files convert.cl ) set( objects convert.cl ) if( NOT ENABLE_RUNTIME_SUBNORMAL ) @@ -299,6 +304,10 @@ foreach( t ${LIBCLC_TARGETS_TO_BUILD} ) set( t "spir--" ) set( build_flags ) set( opt_flags -O3 ) + elseif( ${ARCH} STREQUAL "clspv64" ) + set( t "spir64--" ) + set( build_flags ) + set( opt_flags -O3 ) else() set( build_flags ) set( opt_flags -O3 ) diff --git a/libclc/clspv64 b/libclc/clspv64 new file mode 120000 index 0000000000000..ea01ba94bc636 --- /dev/null +++ b/libclc/clspv64 @@ -0,0 +1 @@ +clspv \ No newline at end of file _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
