kosarev updated this revision to Diff 431979.
kosarev added a comment.
Rebased on top of fixes for non-trivial cases. Going to submit this
tomorrow, if no objections.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D125604/new/
https://reviews.llvm.org/D125604
Files:
clang/test/CodeGenCXX/attr-mustprogress.cpp
clang/test/CodeGenCXX/eh-aggregate-copy-destroy.cpp
clang/test/CodeGenCXX/inheriting-constructor.cpp
clang/test/CodeGenObjC/non-runtime-protocol.m
clang/test/OpenMP/master_taskloop_private_codegen.cpp
clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp
clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp
clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp
clang/test/OpenMP/task_private_codegen.cpp
clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
clang/test/OpenMP/taskloop_private_codegen.cpp
clang/test/OpenMP/taskloop_simd_private_codegen.cpp
flang/test/Fir/convert-to-llvm.fir
flang/test/Lower/Intrinsics/not.f90
llvm/include/llvm/FileCheck/FileCheck.h
llvm/lib/FileCheck/FileCheck.cpp
llvm/test/Analysis/MemorySSA/phi-translation.ll
llvm/test/Analysis/RegionInfo/infinite_loop_4.ll
llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
llvm/test/CodeGen/AMDGPU/hoist-cond.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
llvm/test/CodeGen/AMDGPU/mode-register.mir
llvm/test/CodeGen/AMDGPU/smrd.ll
llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
llvm/test/CodeGen/AVR/atomics/fence.ll
llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
llvm/test/CodeGen/WebAssembly/libcalls.ll
llvm/test/DebugInfo/NVPTX/debug-info.ll
llvm/test/FileCheck/missspelled-directive.txt
llvm/test/MC/AMDGPU/data.s
llvm/test/MC/AsmParser/directive_file-g.s
llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s
llvm/test/MC/WebAssembly/unnamed-data.ll
llvm/test/Transforms/Inline/inline-strictfp.ll
llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
llvm/test/Transforms/MergeFunc/alias.ll
llvm/test/Transforms/PGOProfile/PR41279.ll
llvm/test/Transforms/PGOProfile/memop_clone.ll
llvm/test/Transforms/PGOProfile/memop_size_from_strlen.ll
llvm/test/tools/llvm-dwp/X86/tu_units_v5.s
llvm/test/tools/llvm-dwp/X86/type_dedup_v5.test
llvm/test/tools/llvm-objdump/MachO/disassemble-all.test
llvm/test/tools/llvm-readobj/COFF/unwind-arm64-windows.test
mlir/test/Dialect/Affine/loop-coalescing.mlir
mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
mlir/test/Dialect/Linalg/tile-and-fuse-no-fuse.mlir
mlir/test/Dialect/MemRef/canonicalize.mlir
mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
mlir/test/IR/dynamic.mlir
mlir/test/mlir-tblgen/op-decl-and-defs.td
polly/test/ScopDetect/dot-scops-npm.ll
Index: polly/test/ScopDetect/dot-scops-npm.ll
===================================================================
--- polly/test/ScopDetect/dot-scops-npm.ll
+++ polly/test/ScopDetect/dot-scops-npm.ll
@@ -30,35 +30,35 @@
; CHECK-NEXT: Node0x[[OUTER_EXIT]] -> Node0x[[RETURN_ID:.*]];
; CHECK-NEXT: Node0x[[RETURN_ID]] [shape=record,label="{return:
; CHECK-NEXT: colorscheme = "paired12"
-; CHECK_NEXT: subgraph cluster_0x[[:.*]] {
-; CHECK_NEXT: label = "";
-; CHECK_NEXT: style = solid;
-; CHECK_NEXT: color = 1
-; CHECK_NEXT: subgraph cluster_0x[[:.*]] {
-; CHECK_NEXT: label = "";
-; CHECK_NEXT: style = filled;
-; CHECK_NEXT: color = 3 subgraph cluster_0x7152c40 {
-; CHECK_NEXT: label = "";
-; CHECK_NEXT: style = solid;
-; CHECK_NEXT: color = 5
-; CHECK_NEXT: subgraph cluster_0x[[:.*]] {
-; CHECK_NEXT: label = "";
-; CHECK_NEXT: style = solid;
-; CHECK_NEXT: color = 7
-; CHECK_NEXT: Node0x[[INNER_FOR_ID]];
-; CHECK_NEXT: Node0x[[BABY1_ID]];
-; CHECK_NEXT: Node0x[[INNER_INC_ID]];
-; CHECK_NEXT: }
-; CHECK_NEXT: Node0x[[OUTER_FOR_ID]];
-; CHECK_NEXT: Node0x[[INNER_EXIT_ID]];
-; CHECK_NEXT: Node0x[[OUTER_INC_ID]];
-; CHECK_NEXT: }
-; CHECK_NEXT: Node0x[[OUTER_EXIT]];
-; CHECK_NEXT: }
-; CHECK_NEXT: Node0x[[EntryID]];
-; CHECK_NEXT: Node0x[[RETURN_ID]];
-; CHECK_NEXT: }
-; CHECK_NEXT: }
+; CHECK-NEXT: subgraph cluster_0x{{.*}} {
+; CHECK-NEXT: label = "";
+; CHECK-NEXT: style = solid;
+; CHECK-NEXT: color = 1
+; CHECK-NEXT: subgraph cluster_0x{{.*}} {
+; CHECK-NEXT: label = "";
+; CHECK-NEXT: style = filled;
+; CHECK-NEXT: color = 3 subgraph cluster_0x{{.*}} {
+; CHECK-NEXT: label = "";
+; CHECK-NEXT: style = solid;
+; CHECK-NEXT: color = 5
+; CHECK-NEXT: subgraph cluster_0x{{.*}} {
+; CHECK-NEXT: label = "";
+; CHECK-NEXT: style = solid;
+; CHECK-NEXT: color = 7
+; CHECK-NEXT: Node0x[[INNER_FOR_ID]];
+; CHECK-NEXT: Node0x[[BABY1_ID]];
+; CHECK-NEXT: Node0x[[INNER_INC_ID]];
+; CHECK-NEXT: }
+; CHECK-NEXT: Node0x[[OUTER_FOR_ID]];
+; CHECK-NEXT: Node0x[[INNER_EXIT_ID]];
+; CHECK-NEXT: Node0x[[OUTER_INC_ID]];
+; CHECK-NEXT: }
+; CHECK-NEXT: Node0x[[OUTER_EXIT]];
+; CHECK-NEXT: }
+; CHECK-NEXT: Node0x[[EntryID]];
+; CHECK-NEXT: Node0x[[RETURN_ID]];
+; CHECK-NEXT: }
+; CHECK-NEXT: }
entry:
br label %outer.for
Index: mlir/test/mlir-tblgen/op-decl-and-defs.td
===================================================================
--- mlir/test/mlir-tblgen/op-decl-and-defs.td
+++ mlir/test/mlir-tblgen/op-decl-and-defs.td
@@ -199,7 +199,7 @@
let results = (outs AnyType:$b);
}
-// CHECK_LABEL: class HCollectiveParamsOp :
+// CHECK-LABEL: class HCollectiveParamsOp :
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type b, ::mlir::Value a);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::Value a);
// CHECK: static void build(::mlir::OpBuilder &, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::ValueRange operands, ::llvm::ArrayRef<::mlir::NamedAttribute> attributes = {})
@@ -212,7 +212,7 @@
let results = (outs Variadic<I32>:$b);
}
-// CHECK_LABEL: class HCollectiveParamsSuppress0Op :
+// CHECK-LABEL: class HCollectiveParamsSuppress0Op :
// CHECK-NOT: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange b, ::mlir::ValueRange a);
// CHECK: static void build(::mlir::OpBuilder &, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::ValueRange operands, ::llvm::ArrayRef<::mlir::NamedAttribute> attributes = {});
@@ -224,7 +224,7 @@
let results = (outs I32:$b);
}
-// CHECK_LABEL: class HCollectiveParamsSuppress1Op :
+// CHECK-LABEL: class HCollectiveParamsSuppress1Op :
// CHECK-NOT: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange b, ::mlir::ValueRange a);
// CHECK: static void build(::mlir::OpBuilder &, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::ValueRange operands, ::llvm::ArrayRef<::mlir::NamedAttribute> attributes = {});
@@ -237,7 +237,7 @@
let arguments = (ins Variadic<I32>:$a);
let results = (outs Variadic<I32>:$b, Variadic<F32>:$c);
}
-// CHECK_LABEL: class HCollectiveParamsSuppress2Op :
+// CHECK-LABEL: class HCollectiveParamsSuppress2Op :
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange b, ::mlir::TypeRange c, ::mlir::ValueRange a);
// CHECK-NOT: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange b, ::mlir::ValueRange a);
// CHECK: static void build(::mlir::OpBuilder &, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::ValueRange operands, ::llvm::ArrayRef<::mlir::NamedAttribute> attributes = {});
@@ -247,7 +247,7 @@
let arguments = (ins AnyType:$a, AnyType:$b);
let results = (outs AnyType:$r);
}
-// CHECK_LABEL: class IOp :
+// CHECK-LABEL: class IOp :
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type r, ::mlir::Value a, ::mlir::Value b);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Value a, ::mlir::Value b);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::Value a, ::mlir::Value b);
@@ -259,7 +259,7 @@
let arguments = (ins AnyType:$a, AnyType:$b);
let results = (outs AnyType:$r);
}
-// CHECK_LABEL: class JOp :
+// CHECK-LABEL: class JOp :
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type r, ::mlir::Value a, ::mlir::Value b);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Value a, ::mlir::Value b);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::Value a, ::mlir::Value b);
@@ -292,7 +292,7 @@
let arguments = (ins AnyType:$a, AnyType:$b, I32Attr:$attr1);
let results = (outs AnyType:$r);
}
-// CHECK_LABEL: class LOp :
+// CHECK-LABEL: class LOp :
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Type r, ::mlir::Value a, ::mlir::Value b, ::mlir::IntegerAttr attr1);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::Value a, ::mlir::Value b, ::mlir::IntegerAttr attr1);
// CHECK: static void build(::mlir::OpBuilder &odsBuilder, ::mlir::OperationState &odsState, ::mlir::TypeRange resultTypes, ::mlir::Value a, ::mlir::Value b, ::mlir::IntegerAttr attr1);
Index: mlir/test/IR/dynamic.mlir
===================================================================
--- mlir/test/IR/dynamic.mlir
+++ mlir/test/IR/dynamic.mlir
@@ -11,7 +11,7 @@
"unregistered_op"() : () -> !test.dynamic_singleton
// CHECK-NEXT: "unregistered_op"() : () -> !test.dynamic_pair<i32, f64>
"unregistered_op"() : () -> !test.dynamic_pair<i32, f64>
- // CHECK_NEXT: %{{.*}} = "unregistered_op"() : () -> !test.dynamic_pair<!test.dynamic_pair<i32, f64>, !test.dynamic_singleton>
+ // CHECK-NEXT: %{{.*}} = "unregistered_op"() : () -> !test.dynamic_pair<!test.dynamic_pair<i32, f64>, !test.dynamic_singleton>
"unregistered_op"() : () -> !test.dynamic_pair<!test.dynamic_pair<i32, f64>, !test.dynamic_singleton>
return
}
@@ -53,7 +53,7 @@
"unregistered_op"() {test_attr = #test.dynamic_singleton} : () -> ()
// CHECK-NEXT: "unregistered_op"() {test_attr = #test.dynamic_pair<3 : i32, 5 : i32>} : () -> ()
"unregistered_op"() {test_attr = #test.dynamic_pair<3 : i32, 5 : i32>} : () -> ()
- // CHECK_NEXT: "unregistered_op"() {test_attr = #test.dynamic_pair<3 : i32, 5 : i32>} : () -> ()
+ // CHECK-NEXT: "unregistered_op"() {test_attr = #test.dynamic_pair<#test.dynamic_pair<3 : i32, 5 : i32>, f64>} : () -> ()
"unregistered_op"() {test_attr = #test.dynamic_pair<#test.dynamic_pair<3 : i32, 5 : i32>, f64>} : () -> ()
return
}
Index: mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
===================================================================
--- mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
+++ mlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
@@ -54,7 +54,7 @@
// CHECK-SAME: memref<?x8xf32>, index, index
// CHECK: }
// CHECK: %[[res:.*]] = vector.transfer_read %[[ifres]]#0[%[[ifres]]#1, %[[ifres]]#2], %cst
- // CHECK_SAME: {in_bounds = [true, true]} : memref<?x8xf32>, vector<4x8xf32>
+ // CHECK-SAME: {in_bounds = [true, true]} : memref<?x8xf32>, vector<4x8xf32>
// LINALG-DAG: %[[c0:.*]] = arith.constant 0 : index
// LINALG-DAG: %[[c4:.*]] = arith.constant 4 : index
@@ -89,7 +89,7 @@
// LINALG-SAME: memref<?x8xf32>, index, index
// LINALG: }
// LINALG: %[[res:.*]] = vector.transfer_read %[[ifres]]#0[%[[ifres]]#1, %[[ifres]]#2], %cst
- // LINALG_SAME: {in_bounds = [true, true]} : memref<?x8xf32>, vector<4x8xf32>
+ // LINALG-SAME: {in_bounds = [true, true]} : memref<?x8xf32>, vector<4x8xf32>
%1 = vector.transfer_read %A[%i, %j], %f0 : memref<?x8xf32>, vector<4x8xf32>
// LINALG: return %[[res]] : vector<4x8xf32>
Index: mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
===================================================================
--- mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
+++ mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
@@ -342,7 +342,7 @@
spv.module Logical GLSL450 {
spv.GlobalVariable @var0 : !spv.ptr<f32, Input>
spv.GlobalVariable @var1 : !spv.ptr<!spv.sampled_image<!spv.image<f32, Dim2D, IsDepth, Arrayed, SingleSampled, NeedSampler, Unknown>>, UniformConstant>
- // CHECK_LABEL: @simple_load
+ // CHECK-LABEL: @simple_load
spv.func @simple_load() -> () "None" {
// CHECK: spv.Load "Input" {{%.*}} : f32
%0 = spv.mlir.addressof @var0 : !spv.ptr<f32, Input>
@@ -367,7 +367,7 @@
return
}
-// CHECK_LABEL: @volatile_store
+// CHECK-LABEL: @volatile_store
func.func @volatile_store(%arg0 : f32) -> () {
%0 = spv.Variable : !spv.ptr<f32, Function>
// CHECK: spv.Store "Function" %0, %arg0 ["Volatile"] : f32
@@ -375,7 +375,7 @@
return
}
-// CHECK_LABEL: @aligned_store
+// CHECK-LABEL: @aligned_store
func.func @aligned_store(%arg0 : f32) -> () {
%0 = spv.Variable : !spv.ptr<f32, Function>
// CHECK: spv.Store "Function" %0, %arg0 ["Aligned", 4] : f32
Index: mlir/test/Dialect/MemRef/canonicalize.mlir
===================================================================
--- mlir/test/Dialect/MemRef/canonicalize.mlir
+++ mlir/test/Dialect/MemRef/canonicalize.mlir
@@ -429,7 +429,7 @@
// CHECK-LABEL: func @collapse_after_memref_cast(
// CHECK-SAME: %[[INPUT:.*]]: memref<?x512x1x?xf32>) -> memref<?x?xf32> {
// CHECK: %[[COLLAPSED:.*]] = memref.collapse_shape %[[INPUT]]
-// CHECK_SAME: {{\[\[}}0], [1, 2, 3]] : memref<?x512x1x?xf32> into memref<?x?xf32>
+// CHECK-SAME: {{\[\[}}0], [1, 2, 3]] : memref<?x512x1x?xf32> into memref<?x?xf32>
// CHECK: return %[[COLLAPSED]] : memref<?x?xf32>
func.func @collapse_after_memref_cast(%arg0 : memref<?x512x1x?xf32>) -> memref<?x?xf32> {
%dynamic = memref.cast %arg0: memref<?x512x1x?xf32> to memref<?x?x?x?xf32>
@@ -442,7 +442,7 @@
// CHECK-LABEL: func @collapse_after_memref_cast_type_change_dynamic(
// CHECK-SAME: %[[INPUT:.*]]: memref<1x1x1x?xi64>) -> memref<?x?xi64> {
// CHECK: %[[COLLAPSED:.*]] = memref.collapse_shape %[[INPUT]]
-// CHECK_SAME: {{\[\[}}0, 1, 2], [3]] : memref<1x1x1x?xi64> into memref<1x?xi64>
+// CHECK-SAME: {{\[\[}}0, 1, 2], [3]] : memref<1x1x1x?xi64> into memref<1x?xi64>
// CHECK: %[[DYNAMIC:.*]] = memref.cast %[[COLLAPSED]] :
// CHECK-SAME: memref<1x?xi64> to memref<?x?xi64>
// CHECK: return %[[DYNAMIC]] : memref<?x?xi64>
Index: mlir/test/Dialect/Linalg/tile-and-fuse-no-fuse.mlir
===================================================================
--- mlir/test/Dialect/Linalg/tile-and-fuse-no-fuse.mlir
+++ mlir/test/Dialect/Linalg/tile-and-fuse-no-fuse.mlir
@@ -23,7 +23,7 @@
// -----
-// UNARY_LABEL: @shape_only(
+// UNARY-LABEL: @shape_only(
func.func @shape_only(%arg0 : tensor<?x?xf32>, %arg1 : tensor<?x?xf32>) -> tensor<?x?xf32> {
%cst = arith.constant 0.0 : f32
Index: mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
===================================================================
--- mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
+++ mlir/test/Dialect/Linalg/fuse-with-reshape-by-collapsing.mlir
@@ -39,7 +39,7 @@
// CHECK-SAME: indexing_maps = [#[[MAP0]], #[[MAP1]], #[[MAP2]], #[[MAP0]]]
// CHECK-SAME: iterator_types = ["parallel", "parallel", "parallel", "parallel", "parallel"]
// CHECK-SAME: ins(%[[ARG0]], %[[ARG1_RESHAPE]], %[[ARG2_RESHAPE]] :
-// CHECK_SAME: outs(%[[INIT_RESHAPE]] :
+// CHECK-SAME: outs(%[[INIT_RESHAPE]] :
// CHECK: %[[RESULT_RESHAPE:.+]] = tensor.expand_shape %[[COLLAPSED_OP]] {{\[}}[0], [1, 2], [3], [4, 5, 6], [7]{{\]}}
// CHECK: return %[[RESULT_RESHAPE]]
@@ -153,7 +153,7 @@
// CHECK-SAME: indexing_maps = [#[[MAP0]], #[[MAP1]], #[[MAP2]], #[[MAP3]]]
// CHECK-SAME: iterator_types = ["parallel", "parallel", "parallel", "parallel", "parallel"]
// CHECK-SAME: ins(%[[ARG0]], %[[ARG1_RESHAPE]], %[[ARG2_RESHAPE]] :
-// CHECK_SAME: outs(%[[INIT_RESHAPE]] :
+// CHECK-SAME: outs(%[[INIT_RESHAPE]] :
// CHECK: %[[RESULT_RESHAPE:.+]] = tensor.expand_shape %[[COLLAPSED_OP]] {{\[}}[0], [1, 2, 3], [4], [5, 6], [7]{{\]}}
// CHECK: return %[[RESULT_RESHAPE]]
Index: mlir/test/Dialect/Affine/loop-coalescing.mlir
===================================================================
--- mlir/test/Dialect/Affine/loop-coalescing.mlir
+++ mlir/test/Dialect/Affine/loop-coalescing.mlir
@@ -182,7 +182,7 @@
// The inner pair of loops is coalesced separately.
// CHECK: scf.for
scf.for %k = %i to %j step %c1 {
- // CHECK_NOT: scf.for
+ // CHECK-NOT: scf.for
scf.for %l = %i to %j step %c1 {
"foo"() : () -> ()
}
Index: llvm/test/tools/llvm-readobj/COFF/unwind-arm64-windows.test
===================================================================
--- llvm/test/tools/llvm-readobj/COFF/unwind-arm64-windows.test
+++ llvm/test/tools/llvm-readobj/COFF/unwind-arm64-windows.test
@@ -27,7 +27,7 @@
UNWIND1-NEXT: 0x28 ; ldp x19, x20, [sp], #64
UNWIND1-NEXT: 0xe4 ; end
UNWIND1-NEXT: ]
-UNWIND1_NEXT: }
+UNWIND1-NEXT: }
UNWIND2: ExceptionData {
Index: llvm/test/tools/llvm-objdump/MachO/disassemble-all.test
===================================================================
--- llvm/test/tools/llvm-objdump/MachO/disassemble-all.test
+++ llvm/test/tools/llvm-objdump/MachO/disassemble-all.test
@@ -1,39 +1,39 @@
// RUN: llvm-objdump --macho -d --full-leading-addr --print-imm-hex --no-show-raw-insn %p/Inputs/macho-multiple-text | FileCheck %s --check-prefix=TEXT
TEXT: (__TEXT,__text) section
-TEXT_NEXT: _main:
-TEXT_NEXT: 0000000100000f60 pushq %rbp
-TEXT_NEXT: 0000000100000f61 movq %rsp, %rbp
-TEXT_NEXT: 0000000100000f64 subq $0x10, %rsp
-TEXT_NEXT: 0000000100000f68 movl $0x0, -0x4(%rbp)
-TEXT_NEXT: 0000000100000f6f callq _hello
-TEXT_NEXT: 0000000100000f74 xorl %eax, %eax
-TEXT_NEXT: 0000000100000f76 addq $0x10, %rsp
-TEXT_NEXT: 0000000100000f7a popq %rbp
-TEXT_NEXT: 0000000100000f7b retq
+TEXT-NEXT: _main:
+TEXT-NEXT: 0000000100000f60 pushq %rbp
+TEXT-NEXT: 0000000100000f61 movq %rsp, %rbp
+TEXT-NEXT: 0000000100000f64 subq $0x10, %rsp
+TEXT-NEXT: 0000000100000f68 movl $0x0, -0x4(%rbp)
+TEXT-NEXT: 0000000100000f6f callq _hello
+TEXT-NEXT: 0000000100000f74 xorl %eax, %eax
+TEXT-NEXT: 0000000100000f76 addq $0x10, %rsp
+TEXT-NEXT: 0000000100000f7a popq %rbp
+TEXT-NEXT: 0000000100000f7b retq
// RUN: llvm-objdump --macho -D --full-leading-addr --print-imm-hex --no-show-raw-insn %p/Inputs/macho-multiple-text | FileCheck %s --check-prefix=ALL
ALL: (__TEXT,__text) section
-ALL_NEXT: _main:
-ALL_NEXT: 0000000100000f60 pushq %rbp
-ALL_NEXT: 0000000100000f61 movq %rsp, %rbp
-ALL_NEXT: 0000000100000f64 subq $0x10, %rsp
-ALL_NEXT: 0000000100000f68 movl $0x0, -0x4(%rbp)
-ALL_NEXT: 0000000100000f6f callq _hello
-ALL_NEXT: 0000000100000f74 xorl %eax, %eax
-ALL_NEXT: 0000000100000f76 addq $0x10, %rsp
-ALL_NEXT: 0000000100000f7a popq %rbp
-ALL_NEXT: 0000000100000f7b retq
+ALL-NEXT: _main:
+ALL-NEXT: 0000000100000f60 pushq %rbp
+ALL-NEXT: 0000000100000f61 movq %rsp, %rbp
+ALL-NEXT: 0000000100000f64 subq $0x10, %rsp
+ALL-NEXT: 0000000100000f68 movl $0x0, -0x4(%rbp)
+ALL-NEXT: 0000000100000f6f callq _hello
+ALL-NEXT: 0000000100000f74 xorl %eax, %eax
+ALL-NEXT: 0000000100000f76 addq $0x10, %rsp
+ALL-NEXT: 0000000100000f7a popq %rbp
+ALL-NEXT: 0000000100000f7b retq
ALL: (__TEXT_EXEC,__text) section
-ALL_NEXT: _hello:
-ALL_NEXT: 0000000100001000 pushq %rbp
-ALL_NEXT: 0000000100001001 movq %rsp, %rbp
-ALL_NEXT: 0000000100001004 subq $0x10, %rsp
-ALL_NEXT: 0000000100001008 leaq -0x71(%rip), %rdi ## literal pool for: "hello, world!\n"
-ALL_NEXT: 000000010000100f movb $0x0, %al
-ALL_NEXT: 0000000100001011 callq 0x100000f7c ## symbol stub for: _printf
-ALL_NEXT: 0000000100001016 movl %eax, -0x4(%rbp)
-ALL_NEXT: 0000000100001019 addq $0x10, %rsp
-ALL_NEXT: 000000010000101d popq %rbp
-ALL_NEXT: 000000010000101e retq
+ALL-NEXT: _hello:
+ALL-NEXT: 0000000100001000 pushq %rbp
+ALL-NEXT: 0000000100001001 movq %rsp, %rbp
+ALL-NEXT: 0000000100001004 subq $0x10, %rsp
+ALL-NEXT: 0000000100001008 leaq -0x71(%rip), %rdi ## literal pool for: "hello, world!\n"
+ALL-NEXT: 000000010000100f movb $0x0, %al
+ALL-NEXT: 0000000100001011 callq 0x100000f7c ## symbol stub for: _printf
+ALL-NEXT: 0000000100001016 movl %eax, -0x4(%rbp)
+ALL-NEXT: 0000000100001019 addq $0x10, %rsp
+ALL-NEXT: 000000010000101d popq %rbp
+ALL-NEXT: 000000010000101e retq
Index: llvm/test/tools/llvm-dwp/X86/type_dedup_v5.test
===================================================================
--- llvm/test/tools/llvm-dwp/X86/type_dedup_v5.test
+++ llvm/test/tools/llvm-dwp/X86/type_dedup_v5.test
@@ -7,5 +7,5 @@
# RUN: llvm-dwp %t-a.dwo %t-b.dwo -o %t.dwp
# RUN: llvm-dwarfdump -debug-tu-index %t.dwp | FileCheck %s
-# CHECK_DAG: .debug_tu_index contents:
+# CHECK-DAG: .debug_tu_index contents:
# CHECK: version = 5, units = 1, slots = 2
Index: llvm/test/tools/llvm-dwp/X86/tu_units_v5.s
===================================================================
--- llvm/test/tools/llvm-dwp/X86/tu_units_v5.s
+++ llvm/test/tools/llvm-dwp/X86/tu_units_v5.s
@@ -11,7 +11,7 @@
# CHECK-DAG: .debug_info.dwo contents:
# CHECK: 0x00000000: Type Unit: length = 0x00000017, format = DWARF32, version = 0x0005, unit_type = DW_UT_split_type, abbr_offset = 0x0000, addr_size = 0x08, name = '', type_signature = [[TUID1:.*]], type_offset = 0x0019 (next unit at 0x0000001b)
# CHECK: 0x0000001b: Type Unit: length = 0x00000017, format = DWARF32, version = 0x0005, unit_type = DW_UT_split_type, abbr_offset = 0x0000, addr_size = 0x08, name = '', type_signature = [[TUID2:.*]], type_offset = 0x0019 (next unit at 0x00000036)
-# CHECK_DAG: .debug_tu_index contents:
+# CHECK-DAG: .debug_tu_index contents:
# CHECK: version = 5, units = 2, slots = 4
# CHECK: Index Signature INFO ABBREV
# CHECK: 1 [[TUID1]] [0x00000000, 0x0000001b) [0x00000000, 0x00000010)
Index: llvm/test/Transforms/PGOProfile/memop_size_from_strlen.ll
===================================================================
--- llvm/test/Transforms/PGOProfile/memop_size_from_strlen.ll
+++ llvm/test/Transforms/PGOProfile/memop_size_from_strlen.ll
@@ -3,7 +3,7 @@
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i1)
declare i32 @strlen(i8* nocapture)
-; CHECK_LABEL: test
+; CHECK-LABEL: test
; CHECK: %1 = zext i32 %c to i64
; CHECK: call void @llvm.instrprof.value.profile(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @__profn_test, i32 0, i32 0), i64 {{[0-9]+}}, i64 %1, i32 1, i32 0)
Index: llvm/test/Transforms/PGOProfile/memop_clone.ll
===================================================================
--- llvm/test/Transforms/PGOProfile/memop_clone.ll
+++ llvm/test/Transforms/PGOProfile/memop_clone.ll
@@ -1,7 +1,7 @@
; RUN: opt < %s -passes=pgo-memop-opt -verify-dom-info -S | FileCheck %s
define i32 @test(i8* %a, i8* %b) !prof !1 {
-; CHECK_LABEL: test
+; CHECK-LABEL: test
; CHECK: MemOP.Case.3:
; CHECK: tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* undef, i8* %a, i32 3, i1 false)
; CHECK: MemOP.Case.2:
Index: llvm/test/Transforms/PGOProfile/PR41279.ll
===================================================================
--- llvm/test/Transforms/PGOProfile/PR41279.ll
+++ llvm/test/Transforms/PGOProfile/PR41279.ll
@@ -77,6 +77,6 @@
; USE-DAG: {{![0-9]+}} = !{i32 1, !"ProfileSummary", {{![0-9]+}}}
; USE-DAG: {{![0-9]+}} = !{!"DetailedSummary", {{![0-9]+}}}
; USE-DAG: ![[FUNC_ENTRY_COUNT]] = !{!"function_entry_count", i64 8}
-; USE_DAG: ![[BW_ENTRY1]] = !{!"branch_weights", i32 5, i32 3}
-; USE_DAG: ![[BW_ENTRY2]] = !{!"branch_weights", i32 2, i32 1}
+; USE-DAG: ![[BW_ENTRY1]] = !{!"branch_weights", i32 5, i32 3}
+; USE-DAG: ![[BW_ENTRY2]] = !{!"branch_weights", i32 2, i32 1}
Index: llvm/test/Transforms/MergeFunc/alias.ll
===================================================================
--- llvm/test/Transforms/MergeFunc/alias.ll
+++ llvm/test/Transforms/MergeFunc/alias.ll
@@ -14,7 +14,7 @@
; A strong backing function had to be created for the weak-weak pair
; CHECK: define private void @0(i32* %a) unnamed_addr
-; CHECK_NEXT: call void @dummy4()
+; CHECK-NEXT: call void @dummy4()
; These internal functions are dropped in favor of the external ones
Index: llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
+++ llvm/test/Transforms/LoopVectorize/X86/gather-vs-interleave.ll
@@ -19,7 +19,7 @@
@B = global [10240 x i64] zeroinitializer, align 16
-; CHECK_LABEL: strided_load_i64
+; CHECK-LABEL: strided_load_i64
; CHECK: masked.gather
define void @strided_load_i64() {
br label %1
Index: llvm/test/Transforms/Inline/inline-strictfp.ll
===================================================================
--- llvm/test/Transforms/Inline/inline-strictfp.ll
+++ llvm/test/Transforms/Inline/inline-strictfp.ll
@@ -14,7 +14,7 @@
%0 = call float @inlined_01(float %a) #0
%add = call float @llvm.experimental.constrained.fadd.f32(float %0, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret float %add
-; CHECK_LABEL: @host_02
+; CHECK-LABEL: @host_02
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, metadata !"round.tonearest", metadata !"fpexcept.ignore") #0
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
}
@@ -33,7 +33,7 @@
%0 = call float @inlined_03(float %a) #0
%add = call float @llvm.experimental.constrained.fadd.f32(float %0, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret float %add
-; CHECK_LABEL: @host_04
+; CHECK-LABEL: @host_04
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, metadata !"round.downward", metadata !"fpexcept.maytrap") #0
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
}
@@ -52,7 +52,7 @@
%0 = call float @inlined_05(float %a)
%add = fadd float %0, 2.000000e+00
ret float %add
-; CHECK_LABEL: @host_06
+; CHECK-LABEL: @host_06
; CHECK: call float @inlined_05(float %a)
; CHECK: fadd float %0, 2.000000e+00
}
@@ -75,7 +75,7 @@
%0 = call float @inlined_07(float %a) #0
%add = call float @llvm.experimental.constrained.fadd.f32(float %0, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret float %add
-; CHECK_LABEL: @host_08
+; CHECK-LABEL: @host_08
; CHECK: call float @func_ext(float {{.*}}) #0
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float {{.*}}, metadata !"round.tonearest", metadata !"fpexcept.ignore") #0
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
@@ -96,7 +96,7 @@
%0 = call double @inlined_09(float %a) #0
%add = call double @llvm.experimental.constrained.fadd.f64(double %0, double 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret double %add
-; CHECK_LABEL: @host_10
+; CHECK-LABEL: @host_10
; CHECK: call double @llvm.experimental.constrained.fpext.f64.f32(float {{.*}}, metadata !"fpexcept.ignore") #0
; CHECK: call double @llvm.experimental.constrained.fadd.f64(double {{.*}}, double 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
}
@@ -113,7 +113,7 @@
%add = call float @llvm.experimental.constrained.fadd.f32(float %a, float %b, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
%cmp = call i1 @inlined_11(float %a, float %b) #0
ret i1 %cmp
-; CHECK_LABEL: @host_12
+; CHECK-LABEL: @host_12
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float %a, float %b, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
; CHECK: call i1 @llvm.experimental.constrained.fcmp.f32(float {{.*}}, metadata !"oeq", metadata !"fpexcept.ignore") #0
}
@@ -130,7 +130,7 @@
%0 = call float @inlined_13(float %a) #0
%add = call float @llvm.experimental.constrained.fadd.f32(float %0, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
ret float %add
-; CHECK_LABEL: @host_14
+; CHECK-LABEL: @host_14
; CHECK: call float @llvm.experimental.constrained.ceil.f32(float %a, metadata !"fpexcept.ignore") #0
; CHECK: call float @llvm.experimental.constrained.fadd.f32(float {{.*}}, float 2.000000e+00, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
}
Index: llvm/test/MC/WebAssembly/unnamed-data.ll
===================================================================
--- llvm/test/MC/WebAssembly/unnamed-data.ll
+++ llvm/test/MC/WebAssembly/unnamed-data.ll
@@ -87,4 +87,4 @@
; CHECK-NEXT: Name: .data.b
; CHECK-NEXT: Alignment: 3
; CHECK-NEXT: Flags: [ ]
-; CHECK_NEXT: ...
+; CHECK-NEXT: ...
Index: llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s
===================================================================
--- llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s
+++ llvm/test/MC/PowerPC/ppc64-reloc-directive-pcrel.s
@@ -42,7 +42,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: SingleInsnBetween
+# CHECK-LABEL: SingleInsnBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0xc
@@ -68,7 +68,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: MultiInsnBetween
+# CHECK-LABEL: MultiInsnBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x1c
@@ -98,7 +98,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: PrefixInsnBetween
+# CHECK-LABEL: PrefixInsnBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x28
@@ -130,7 +130,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: SpaceBetween
+# CHECK-LABEL: SpaceBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x50
@@ -202,7 +202,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: VarLabelSingleInsnBetween
+# CHECK-LABEL: VarLabelSingleInsnBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0xc
@@ -227,7 +227,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: VarLabelMultiInsnBetween
+# CHECK-LABEL: VarLabelMultiInsnBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x1c
@@ -257,7 +257,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: VarLabelPrefixInsnBetween
+# CHECK-LABEL: VarLabelPrefixInsnBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x24
@@ -288,7 +288,7 @@
blr
.long 0
.quad 0
-# CHECK_LABEL: VarLabelSpaceBetween
+# CHECK-LABEL: VarLabelSpaceBetween
# CHECK: pld 3, 0(0), 1
# CHECK-NEXT: R_PPC64_GOT_PCREL34 vec
# CHECK-NEXT: R_PPC64_PCREL_OPT *ABS*+0x4c
Index: llvm/test/MC/AsmParser/directive_file-g.s
===================================================================
--- llvm/test/MC/AsmParser/directive_file-g.s
+++ llvm/test/MC/AsmParser/directive_file-g.s
@@ -16,7 +16,7 @@
## gcc does generate a DW_TAG_compile_unit in this case, with or without
## -g on the command line, but we do not.
# CHECK-EMPTY:
-# CHECK_NEXT: .debug_line
+# CHECK-NEXT: .debug_line
# CHECK: file_names[ 1]:
# CHECK-NEXT: name: "a.c"
# CHECK-NEXT: dir_index: 0
Index: llvm/test/MC/AMDGPU/data.s
===================================================================
--- llvm/test/MC/AMDGPU/data.s
+++ llvm/test/MC/AMDGPU/data.s
@@ -16,7 +16,7 @@
// CHECK: v_mov_b32
// CHECK: v_mov_b32
// CHECK: .long 0xabadc0de
-// CHECK_SAME: : ABADC0DE
+// CHECK-SAME: : ABADC0DE
// CHECK: s_endpgm
// CHECK: .long 0xabadc0d1
// CHECK: .long 0xabadc0d2
Index: llvm/test/FileCheck/missspelled-directive.txt
===================================================================
--- /dev/null
+++ llvm/test/FileCheck/missspelled-directive.txt
@@ -0,0 +1,28 @@
+RUN: not FileCheck --check-prefix=P1 %s 2>&1 | FileCheck --check-prefix=CHECK1 %s
+RUN: not FileCheck --check-prefix=P2 %s 2>&1 | FileCheck --check-prefix=CHECK2 %s
+RUN: not FileCheck --check-prefix=P3 %s 2>&1 | FileCheck --check-prefix=CHECK3 %s
+RUN: not FileCheck --check-prefix=P4 %s 2>&1 | FileCheck --check-prefix=CHECK4 %s
+RUN: not FileCheck --check-prefix=P5 %s 2>&1 | FileCheck --check-prefix=CHECK5 %s
+RUN: not FileCheck --check-prefix=P6 %s 2>&1 | FileCheck --check-prefix=CHECK6 %s
+RUN: not FileCheck --check-prefix=P7 %s 2>&1 | FileCheck --check-prefix=CHECK7 %s
+
+P1_LABEL: foo
+CHECK1: error: misspelled directive 'P1_LABEL:'
+
+P2_NEXT: foo
+CHECK2: error: misspelled directive 'P2_NEXT:'
+
+P3_NOT: foo
+CHECK3: error: misspelled directive 'P3_NOT:'
+
+P4_COUNT-2: foo
+CHECK4: error: misspelled directive 'P4_COUNT-2:'
+
+P5_SAME: foo
+CHECK5: error: misspelled directive 'P5_SAME:'
+
+P6_EMPTY: foo
+CHECK6: error: misspelled directive 'P6_EMPTY:'
+
+P7_DAG: foo
+CHECK7: error: misspelled directive 'P7_DAG:'
Index: llvm/test/DebugInfo/NVPTX/debug-info.ll
===================================================================
--- llvm/test/DebugInfo/NVPTX/debug-info.ll
+++ llvm/test/DebugInfo/NVPTX/debug-info.ll
@@ -101,7 +101,7 @@
; CHECK-DAG: .file {{[0-9]+}} "{{.*}}/usr/include{{/|\\\\}}stdlib-bsearch.h"
; CHECK-DAG: .file {{[0-9]+}} "{{.*}}clang/include{{/|\\\\}}stddef.h"
; CHECK-DAG: .file {{[0-9]+}} "{{.*}}/usr/local/cuda/include{{/|\\\\}}math_functions.hpp"
-; CHECK_DAG: .file {{[0-9]+}} "{{.*}}clang/include{{/|\\\\}}__clang_cuda_cmath.h"
+; CHECK-DAG: .file {{[0-9]+}} "{{.*}}clang/include{{/|\\\\}}__clang_cuda_cmath.h"
; CHECK-DAG: .file {{[0-9]+}} "{{.*}}/usr/local/cuda/include{{/|\\\\}}device_functions.hpp"
; CHECK-DAG: .file [[DEBUG_INFO_CU]] "{{.*}}debug-info.cu"
; CHECK-DAG: .file [[BUILTUIN_VARS_H]] "{{.*}}clang/include{{/|\\\\}}__clang_cuda_builtin_vars.h"
Index: llvm/test/CodeGen/WebAssembly/libcalls.ll
===================================================================
--- llvm/test/CodeGen/WebAssembly/libcalls.ll
+++ llvm/test/CodeGen/WebAssembly/libcalls.ll
@@ -49,7 +49,8 @@
; CHECK-LABEL: i128libcalls:
define i128 @i128libcalls(i128 %x, i128 %y) {
; Basic ops should be expanded
- ; CHECK_NOT: call
+ ; CHECK: .local
+ ; CHECK-NOT: call
%a = add i128 %x, %y
; CHECK: call __multi3
%b = mul i128 %a, %y
Index: llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
===================================================================
--- llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
+++ llvm/test/CodeGen/BPF/CORE/offset-reloc-middle-chain.ll
@@ -56,18 +56,18 @@
; CHECK: .long 16 # FieldReloc
; CHECK-NEXT: .long 29 # Field reloc section string offset=29
; CHECK-NEXT: .long 3
-; CHECK_NEXT: .long .Ltmp{{[0-9]+}}
-; CHECK_NEXT: .long 2
-; CHECK_NEXT: .long 72
-; CHECK_NEXT: .long 0
-; CHECK_NEXT: .long .Ltmp{{[0-9]+}}
-; CHECK_NEXT: .long 2
-; CHECK_NEXT: .long 76
-; CHECK_NEXT: .long 0
-; CHECK_NEXT: .long .Ltmp{{[0-9]+}}
-; CHECK_NEXT: .long 2
-; CHECK_NEXT: .long 82
-; CHECK_NEXT: .long 0
+; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
+; CHECK-NEXT: .long 2
+; CHECK-NEXT: .long 72
+; CHECK-NEXT: .long 0
+; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
+; CHECK-NEXT: .long 2
+; CHECK-NEXT: .long 76
+; CHECK-NEXT: .long 0
+; CHECK-NEXT: .long .Ltmp{{[0-9]+}}
+; CHECK-NEXT: .long 2
+; CHECK-NEXT: .long 82
+; CHECK-NEXT: .long 0
; Function Attrs: nounwind readnone
declare %struct.s1* @llvm.preserve.struct.access.index.p0s_struct.s1s.p0s_struct.r1s(%struct.r1*, i32, i32) #1
Index: llvm/test/CodeGen/AVR/atomics/fence.ll
===================================================================
--- llvm/test/CodeGen/AVR/atomics/fence.ll
+++ llvm/test/CodeGen/AVR/atomics/fence.ll
@@ -3,7 +3,7 @@
; Checks that atomic fences are simply removed from IR.
; AVR is always singlethreaded so fences do nothing.
-; CHECK_LABEL: atomic_fence8
+; CHECK-LABEL: atomic_fence8
; CHECK: ; %bb.0:
; CHECK-NEXT: ret
define void @atomic_fence8() {
Index: llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
===================================================================
--- llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
+++ llvm/test/CodeGen/ARM/cmpxchg-O0-be.ll
@@ -4,7 +4,7 @@
@y = global i64 20, align 8
@z = global i64 20, align 8
-; CHECK_LABEL: main:
+; CHECK-LABEL: main:
; CHECK: ldr [[R2:r[0-9]+]], [[[R1:r[0-9]+]]]
; CHECK-NEXT: ldr [[R1]], [[[R1]], #4]
; CHECK: mov [[R4:r[0-9]+]], [[R1]]
Index: llvm/test/CodeGen/AMDGPU/smrd.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/smrd.ll
+++ llvm/test/CodeGen/AMDGPU/smrd.ll
@@ -396,12 +396,12 @@
;
; GCN: s_buffer_load_dwordx2
; SICIVI: s_mov_b32 m0
-; SICIVI_DAG: v_interp_p1_f32
-; SICIVI_DAG: v_interp_p1_f32
-; SICIVI_DAG: v_interp_p1_f32
-; SICIVI_DAG: v_interp_p2_f32
-; SICIVI_DAG: v_interp_p2_f32
-; SICIVI_DAG: v_interp_p2_f32
+; SICIVI-DAG: v_interp_p1_f32
+; SICIVI-DAG: v_interp_p1_f32
+; SICIVI-DAG: v_interp_p1_f32
+; SICIVI-DAG: v_interp_p2_f32
+; SICIVI-DAG: v_interp_p2_f32
+; SICIVI-DAG: v_interp_p2_f32
;
; extractelement does not result in movrels anymore for vectors gitting 8 dwords
; SICIVI-NOT: s_mov_b32 m0
Index: llvm/test/CodeGen/AMDGPU/mode-register.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/mode-register.mir
+++ llvm/test/CodeGen/AMDGPU/mode-register.mir
@@ -278,7 +278,7 @@
# check that mode is propagated back to start of loop and through a block that
# neither sets or uses the mode.
# CHECK-LABEL: name: loop_indirect
-# CHECK_NOT: S_SETREG_IMM32_B32
+# CHECK-NOT: S_SETREG_IMM32_B32
# CHECK-LABEL: bb.3:
# CHECK: S_SETREG_IMM32_B32 3, 2177
# CHECK: V_INTERP_P1LL_F16
Index: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
+++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll
@@ -37,7 +37,7 @@
; CHECK: s_mov_b64 [[LIVE:s\[[0-9]+:[0-9]+\]]], exec
; CHECK-DAG: s_wqm_b64 exec, exec
; CHECK-DAG: s_xor_b64 [[HELPER:s\[[0-9]+:[0-9]+\]]], [[LIVE]], -1
-; CHECK_DAG: s_and_saveexec_b64 [[SAVED:s\[[0-9]+:[0-9]+\]]], [[HELPER]]
+; CHECK-DAG: s_and_saveexec_b64 [[SAVED:s\[[0-9]+:[0-9]+\]]], [[HELPER]]
; CHECK: ; %dead
define amdgpu_ps float @test3(i32 %in) #0 {
entry:
Index: llvm/test/CodeGen/AMDGPU/hoist-cond.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/hoist-cond.ll
+++ llvm/test/CodeGen/AMDGPU/hoist-cond.ll
@@ -7,7 +7,7 @@
; CHECK: v_cmp_{{..}}_u32_e{{32|64}} [[COND:s\[[0-9]+:[0-9]+\]|vcc]]
; CHECK: BB0_1:
; CHECK-NOT: v_cmp
-; CHECK_NOT: v_cndmask
+; CHECK-NOT: v_cndmask
; CHECK: s_and_saveexec_b64 s[{{[0-9]+:[0-9]+}}], [[COND]]
; CHECK: ; %bb.2:
Index: llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
+++ llvm/test/CodeGen/AMDGPU/divergence-driven-bfe-isel.ll
@@ -1,6 +1,6 @@
; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
-; GCN_LABEL: @bfe_uniform
+; GCN-LABEL: @bfe_uniform
; GCN: s_bfe_u32 s{{[0-9]+}}, s{{[0-9]+}}, 0x40010
define amdgpu_kernel void @bfe_uniform(i32 %val, i32 addrspace(1)* %out) {
%hibits = lshr i32 %val, 16
@@ -9,7 +9,7 @@
ret void
}
-; GCN_LABEL: @bfe_divergent
+; GCN-LABEL: @bfe_divergent
; GCN: v_bfe_u32 v{{[0-9]+}}, v{{[0-9]+}}, 16, 4
define amdgpu_kernel void @bfe_divergent(i32 %val, i32 addrspace(1)* %out) {
%tid = call i32 @llvm.amdgcn.workitem.id.x()
Index: llvm/test/Analysis/RegionInfo/infinite_loop_4.ll
===================================================================
--- llvm/test/Analysis/RegionInfo/infinite_loop_4.ll
+++ llvm/test/Analysis/RegionInfo/infinite_loop_4.ll
@@ -40,7 +40,7 @@
; CHECK-NOT: =>
; CHECK: [0] 0 => <Function Return>
; CHECK-NEXT: [1] 2 => 10
-; CHECK_NEXT: [2] 5 => 6
+; CHECK-NEXT: [2] 5 => 6
; STAT: 3 region - The # of regions
; STAT: 1 region - The # of simple regions
Index: llvm/test/Analysis/MemorySSA/phi-translation.ll
===================================================================
--- llvm/test/Analysis/MemorySSA/phi-translation.ll
+++ llvm/test/Analysis/MemorySSA/phi-translation.ll
@@ -195,7 +195,7 @@
define i32 @use_not_optimized_due_to_backedge(i32* nocapture %m_i_strides, i32* nocapture readonly %eval_left_dims) {
entry:
; CHECK: 1 = MemoryDef(liveOnEntry)
-; CHECK_NEXT: store i32 1, i32* %m_i_strides, align 4
+; CHECK-NEXT: store i32 1, i32* %m_i_strides, align 4
store i32 1, i32* %m_i_strides, align 4
br label %for.body
Index: llvm/lib/FileCheck/FileCheck.cpp
===================================================================
--- llvm/lib/FileCheck/FileCheck.cpp
+++ llvm/lib/FileCheck/FileCheck.cpp
@@ -1651,6 +1651,8 @@
switch (Kind) {
case Check::CheckNone:
return "invalid";
+ case Check::CheckMisspelled:
+ return "misspelled";
case Check::CheckPlain:
if (Count > 1)
return WithModifiers("-COUNT");
@@ -1680,7 +1682,8 @@
}
static std::pair<Check::FileCheckType, StringRef>
-FindCheckType(const FileCheckRequest &Req, StringRef Buffer, StringRef Prefix) {
+FindCheckType(const FileCheckRequest &Req, StringRef Buffer, StringRef Prefix,
+ bool &Misspelled) {
if (Buffer.size() <= Prefix.size())
return {Check::CheckNone, StringRef()};
@@ -1722,7 +1725,9 @@
if (Rest.front() == '{')
return ConsumeModifiers(Check::CheckPlain);
- if (!Rest.consume_front("-"))
+ if (Rest.consume_front("_"))
+ Misspelled = true;
+ else if (!Rest.consume_front("-"))
return {Check::CheckNone, StringRef()};
if (Rest.consume_front("COUNT-")) {
@@ -1766,6 +1771,15 @@
return {Check::CheckNone, Rest};
}
+static std::pair<Check::FileCheckType, StringRef>
+FindCheckType(const FileCheckRequest &Req, StringRef Buffer, StringRef Prefix) {
+ bool Misspelled = false;
+ auto Res = FindCheckType(Req, Buffer, Prefix, Misspelled);
+ if (Res.first != Check::CheckNone && Misspelled)
+ return {Check::CheckMisspelled, Res.second};
+ return Res;
+}
+
// From the given position, find the next character after the word.
static size_t SkipWord(StringRef Str, size_t Loc) {
while (Loc < Str.size() && IsPartOfWord(Str[Loc]))
@@ -1939,6 +1953,16 @@
Buffer = AfterSuffix.empty() ? Buffer.drop_front(UsedPrefix.size())
: AfterSuffix;
+ // Complain about misspelled directives.
+ if (CheckTy == Check::CheckMisspelled) {
+ StringRef UsedDirective(UsedPrefix.data(),
+ AfterSuffix.data() - UsedPrefix.data());
+ SM.PrintMessage(SMLoc::getFromPointer(UsedDirective.data()),
+ SourceMgr::DK_Error,
+ "misspelled directive '" + UsedDirective + "'");
+ return true;
+ }
+
// Complain about useful-looking but unsupported suffixes.
if (CheckTy == Check::CheckBadNot) {
SM.PrintMessage(SMLoc::getFromPointer(Buffer.data()), SourceMgr::DK_Error,
Index: llvm/include/llvm/FileCheck/FileCheck.h
===================================================================
--- llvm/include/llvm/FileCheck/FileCheck.h
+++ llvm/include/llvm/FileCheck/FileCheck.h
@@ -48,6 +48,7 @@
enum FileCheckKind {
CheckNone = 0,
+ CheckMisspelled,
CheckPlain,
CheckNext,
CheckSame,
Index: flang/test/Lower/Intrinsics/not.f90
===================================================================
--- flang/test/Lower/Intrinsics/not.f90
+++ flang/test/Lower/Intrinsics/not.f90
@@ -1,10 +1,9 @@
! RUN: bbc -emit-fir %s -o - | FileCheck %s
-! CHECK-LABEL: not_test
subroutine not_test
integer :: source
integer :: destination
- ! CHECK_LABEL: not_test
+ ! CHECK-LABEL: not_test
! CHECK: %[[dest:.*]] = fir.alloca i32 {bindc_name = "destination", uniq_name = "_QFnot_testEdestination"}
! CHECK: %[[source:.*]] = fir.alloca i32 {bindc_name = "source", uniq_name = "_QFnot_testEsource"}
! CHECK: %[[loaded_source:.*]] = fir.load %[[source]] : !fir.ref<i32>
Index: flang/test/Fir/convert-to-llvm.fir
===================================================================
--- flang/test/Fir/convert-to-llvm.fir
+++ flang/test/Fir/convert-to-llvm.fir
@@ -774,7 +774,7 @@
}
// CHECK-LABEL: @test_constc4
-// CHECK_SAME: () -> !llvm.struct<(f32, f32)>
+// CHECK-SAME: () -> !llvm.struct<(f32, f32)>
// CHECK-DAG: [[rp:%.*]] = llvm.mlir.constant(1.400000e+00 : f32) : f32
// CHECK-DAG: [[ip:%.*]] = llvm.mlir.constant(2.300000e+00 : f32) : f32
// CHECK: [[undef:%.*]] = llvm.mlir.undef : !llvm.struct<(f32, f32)>
@@ -788,7 +788,7 @@
}
// CHECK-LABEL: @test_constc8
-// CHECK_SAME: () -> !llvm.struct<(f64, f64)>
+// CHECK-SAME: () -> !llvm.struct<(f64, f64)>
// CHECK-DAG: [[rp:%.*]] = llvm.mlir.constant(1.800000e+00 : f64) : f64
// CHECK-DAG: [[ip:%.*]] = llvm.mlir.constant(2.300000e+00 : f64) : f64
// CHECK: [[undef:%.*]] = llvm.mlir.undef : !llvm.struct<(f64, f64)>
Index: clang/test/OpenMP/taskloop_simd_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/taskloop_simd_private_codegen.cpp
+++ clang/test/OpenMP/taskloop_simd_private_codegen.cpp
@@ -244,7 +244,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/OpenMP/taskloop_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/taskloop_private_codegen.cpp
+++ clang/test/OpenMP/taskloop_private_codegen.cpp
@@ -244,7 +244,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
===================================================================
--- clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
+++ clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
@@ -220,7 +220,7 @@
// CHECK-DAG: call {{.+}}(%struct.S* {{.+}})
// CHECK-DAG: br i1 %
// CHECK-DAG: ret void
-// CHECK_DAG: }
+// CHECK-DAG: }
// CHECK-DAG: define internal void @[[VLAINIT]](i8* noalias noundef %{{.+}}, i8* noalias noundef %{{.+}})
// CHECK-DAG: call i32 @__kmpc_global_thread_num(%struct.ident_t* {{[^,]+}})
@@ -240,7 +240,7 @@
// CHECK-DAG: add nsw i32 %
// CHECK-DAG: trunc i32 %{{.+}} to i16
// CHECK-DAG: store i16 %
-// CHECK_DAG: br i1 %
+// CHECK-DAG: br i1 %
// CHECK-DAG: ret void
// CHECK-DAG: }
#endif
Index: clang/test/OpenMP/task_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/task_private_codegen.cpp
+++ clang/test/OpenMP/task_private_codegen.cpp
@@ -244,7 +244,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp
+++ clang/test/OpenMP/parallel_master_taskloop_simd_private_codegen.cpp
@@ -243,7 +243,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp
+++ clang/test/OpenMP/parallel_master_taskloop_private_codegen.cpp
@@ -243,7 +243,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp
+++ clang/test/OpenMP/master_taskloop_simd_private_codegen.cpp
@@ -244,7 +244,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/OpenMP/master_taskloop_private_codegen.cpp
===================================================================
--- clang/test/OpenMP/master_taskloop_private_codegen.cpp
+++ clang/test/OpenMP/master_taskloop_private_codegen.cpp
@@ -251,7 +251,7 @@
// CHECK-DAG: [[PRIV_T_VAR]]
// CHECK-DAG: [[PRIV_S_ARR]]
// CHECK-DAG: [[PRIV_VEC]]
-// CHECK_DAG: [[PRIV_SIVAR]]
+// CHECK-DAG: [[PRIV_SIVAR]]
// CHECK: ret
Index: clang/test/CodeGenObjC/non-runtime-protocol.m
===================================================================
--- clang/test/CodeGenObjC/non-runtime-protocol.m
+++ clang/test/CodeGenObjC/non-runtime-protocol.m
@@ -61,7 +61,7 @@
// NONFRAGILE-NOT: _OBJC_CLASS_PROTOCOLS_$_NonRuntimeImplementer
// FRAGILE-NOT: OBJC_CLASS_NAME_.{{.*}}"Runtime\00"
// FRAGILE-NOT: OBJC_PROTOCOL_NonRuntime
-// FRAGILE_NOT: OBJC_PROTOCOLS_NonRuntimeImplementer
+// FRAGILE-NOT: OBJC_PROTOCOLS_NonRuntimeImplementer
// GNU-NOT: private unnamed_addr constant {{.*}} c"NonRuntimeProtocol\00"
// GNU-NOT: @.objc_protocol {{.*}}
// GNU2-NOT: private unnamed_addr constant {{.*}} c"NonRuntimeProtocol\00"
Index: clang/test/CodeGenCXX/inheriting-constructor.cpp
===================================================================
--- clang/test/CodeGenCXX/inheriting-constructor.cpp
+++ clang/test/CodeGenCXX/inheriting-constructor.cpp
@@ -93,7 +93,7 @@
C c(1, 2, &c);
// Complete object ctor forwards to A ctor, then calls B's base inheriting
// constructor, which takes no arguments other than the this pointer and VTT.
- // ITANIUM_LABEL: define linkonce_odr void @_ZN14noninline_virt1CCI1NS_1AEEiO1QPvU17pass_object_size0(
+ // ITANIUM-LABEL: define linkonce_odr void @_ZN14noninline_virt1CCI1NS_1AEEiO1QPvU17pass_object_size0(
// ITANIUM: call void @_ZN14noninline_virt1AC2EiO1QPvU17pass_object_size0({{.*}} %{{.*}}, i32 %{{.*}}, %{{.*}}* {{.*}}, i8* %{{.*}}, i{{32|64}} %{{.*}})
// ITANIUM: call void @_ZN14noninline_virt1BCI2NS_1AEEiO1QPvU17pass_object_size0(%{{.*}}* {{[^,]*}} %{{.*}}, i8** getelementptr inbounds ([2 x i8*], [2 x i8*]* @_ZTTN14noninline_virt1CE, i64 0, i64 1))
// ITANIUM: store {{.*}} @_ZTVN14noninline_virt1CE
Index: clang/test/CodeGenCXX/eh-aggregate-copy-destroy.cpp
===================================================================
--- clang/test/CodeGenCXX/eh-aggregate-copy-destroy.cpp
+++ clang/test/CodeGenCXX/eh-aggregate-copy-destroy.cpp
@@ -23,7 +23,7 @@
int main () {
try {
Container c1;
- // CHECK_LABEL: main
+ // CHECK-LABEL: main
// CHECK-NOT: call void @_ZN9ThrowCopyC1ERKS_
// CHECK: invoke void @_ZN9ThrowCopyC1ERKS_
// CHECK98: invoke void @_ZN12ImplicitCopyD1Ev
Index: clang/test/CodeGenCXX/attr-mustprogress.cpp
===================================================================
--- clang/test/CodeGenCXX/attr-mustprogress.cpp
+++ clang/test/CodeGenCXX/attr-mustprogress.cpp
@@ -125,7 +125,7 @@
// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP0]], [[TMP1]]
// CHECK-NEXT: br i1 [[CMP]], label %for.body, label %for.end
// CHECK: for.body:
-// CXX98_NOT: br {{.*}} !llvm.loop
+// CXX98-NOT: br {{.*}} !llvm.loop
// CXX11-NEXT: br label %for.cond, !llvm.loop [[LOOP6:!.*]]
// FINITE-NEXT: br label %for.cond, !llvm.loop [[LOOP6:!.*]]
// CHECK: for.end:
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