Author: Craig Topper Date: 2022-09-14T14:51:37-07:00 New Revision: 6106a6d7fe48ac26bc39621898b90766e2a10bd0
URL: https://github.com/llvm/llvm-project/commit/6106a6d7fe48ac26bc39621898b90766e2a10bd0 DIFF: https://github.com/llvm/llvm-project/commit/6106a6d7fe48ac26bc39621898b90766e2a10bd0.diff LOG: [RISCV] Update error message to not call 'RV32' and 'RV64' an extension. I used RV32 so I didn't have to write RV32I and RV32E. Ideally these builtins will be wrapped in a header someday so long term I don't expect users to see these errors. Reviewed By: asb Differential Revision: https://reviews.llvm.org/D133444 Added: Modified: clang/include/clang/Basic/DiagnosticSemaKinds.td clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c Removed: ################################################################################ diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td b/clang/include/clang/Basic/DiagnosticSemaKinds.td index 016affb1b3236..97ccc2a98c93b 100644 --- a/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -11636,7 +11636,7 @@ def warn_tcb_enforcement_violation : Warning< // RISC-V builtin required extension warning def err_riscv_builtin_requires_extension : Error< - "builtin requires at least one of the following extensions to be enabled: %0">; + "builtin requires%select{| at least one of the following extensions to be enabled}0: %1">; def err_riscv_builtin_invalid_lmul : Error< "LMUL argument must be in the range [0,3] or [5,7]">; diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 53c108356316e..bc9642d17d852 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -4369,13 +4369,20 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, if (llvm::none_of(ReqOpFeatures, [&TI](StringRef OF) { return TI.hasFeature(OF); })) { std::string FeatureStrs; + bool IsExtension = true; for (StringRef OF : ReqOpFeatures) { // If the feature is 64bit, alter the string so it will print better in // the diagnostic. - if (OF == "64bit") + if (OF == "64bit") { + assert(ReqOpFeatures.size() == 1 && "Expected '64bit' to be alone"); OF = "RV64"; - if (OF == "32bit") + IsExtension = false; + } + if (OF == "32bit") { + assert(ReqOpFeatures.size() == 1 && "Expected '32bit' to be alone"); OF = "RV32"; + IsExtension = false; + } // Convert features like "zbr" and "experimental-zbr" to "Zbr". OF.consume_front("experimental-"); @@ -4390,6 +4397,7 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI, // Error message FeatureMissing = true; Diag(TheCall->getBeginLoc(), diag::err_riscv_builtin_requires_extension) + << IsExtension << TheCall->getSourceRange() << StringRef(FeatureStrs); } } diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c index 5952443b0944a..cb90a26c3b0cd 100644 --- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c +++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv32-zbb-error.c @@ -2,5 +2,5 @@ // RUN: %clang_cc1 -triple riscv32 -target-feature +zbb -verify %s -o - int orc_b_64(int a) { - return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires at least one of the following extensions to be enabled: 'RV64'}} + return __builtin_riscv_orc_b_64(a); // expected-error {{builtin requires: 'RV64'}} } diff --git a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c index b783a3546acc8..d580d70ee4d36 100644 --- a/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c +++ b/clang/test/CodeGen/RISCV/rvb-intrinsics/riscv64-zbkb-error.c @@ -3,10 +3,10 @@ int zip(int rs1) { - return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires at least one of the following extensions to be enabled: 'RV32'}} + return __builtin_riscv_zip_32(rs1); // expected-error {{builtin requires: 'RV32'}} } int unzip(int rs1) { - return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires at least one of the following extensions to be enabled: 'RV32'}} + return __builtin_riscv_unzip_32(rs1); // expected-error {{builtin requires: 'RV32'}} } _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits