pengfei added inline comments.
================
Comment at: clang/lib/CodeGen/TargetInfo.cpp:1858-1859
}
- return getIndirectResult(Ty, /*ByVal=*/false, State);
+ bool ByVal = IsVectorCall && Ty->isFloatingType();
+ return getIndirectResult(Ty, ByVal, State);
}
----------------
rnk wrote:
> I would try to refactor this so that the vectorcall HFA that can't be passed
> in SSE regs falls through to the following logic. I suspect that it correctly
> handles each case that we care about:
> - double: direct
> - vector: indirect for alignment
> - aggregate: indirect for alignment, any HFA will presumably be aligned to
> more than 32bits
>
Not sure if I understand it correctly, the HFA is not a floating type, so it
won't be affected. Add a test case for it.
MSVC passes it indirectly too. https://gcc.godbolt.org/z/3qf4dTYfv
================
Comment at: clang/test/CodeGen/vectorcall.c:157
+// X86-SAME: <4 x float> inreg noundef %xmm5,
+// X86-SAME: double* noundef byval(double) align 4 %0)
#endif
----------------
rnk wrote:
> Why not pass the double directly? That should be ABI compatible:
> https://gcc.godbolt.org/z/W4rjn63b5
Sorry, I'm not sure what's your mean here. Do you mean I should use your
example as the test case? Here the case mocked `vectorcall_indirect_vec`, which
I think is intended to check if the type, `inreg` and `byval` etc. are
generated correctly.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134797/new/
https://reviews.llvm.org/D134797
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