aaron.ballman added a comment.
In D127762#4102436 <https://reviews.llvm.org/D127762#4102436>, @erichkeane
wrote:
> Finally, and this is something @aaron.ballman probably wants to answer: Is
> this sufficiently important that we're willing to take the additional
> overhead of 8 bits for each function type (plus an extra 8 bits for its
> prototype?). Memory wise, this seems a little costly.
It'd be nice to have a rough idea of what the overhead costs are. I think we
can steal a few bits back to reduce memory overhead if necessary.
================
Comment at: clang/include/clang/AST/Type.h:4123
bool HasTrailingReturn : 1;
+ unsigned AArch64SMEAttributes : 8;
Qualifiers TypeQuals;
----------------
We could steal two bits back here and make this a 6-bit bit-field (we'd
probably want to adjust `SME_AttributeMask` accordingly as well).
================
Comment at: clang/include/clang/Basic/AttrDocs.td:6322
+
+Only when Clang defines __ARM_FEATURE_SME, the support for this feature is
+considered to be stable and complete.
----------------
aaron.ballman wrote:
> Double-checking: that macro is missing the trailing double underscore, is
> that expected?
Still wondering on this.
================
Comment at: clang/lib/Sema/SemaDecl.cpp:3746-3753
+ // It is not allowed to redeclare an SME function with different SME
+ // attributes.
+ if (IsInvalidSMECallConversion(Old->getType(), New->getType())) {
+ Diag(New->getLocation(), diag::err_sme_attr_mismatch)
+ << New->getType() << Old->getType();
+ Diag(OldLocation, diag::note_previous_declaration);
+ return true;
----------------
sdesmalen wrote:
> aaron.ballman wrote:
> > How should these work with template (partial) specializations? Should it be
> > invalid to write this on the primary template? Should it be invalid if the
> > specialization doesn't match the primary template?
> Can you share an example of what you're thinking of?
>
> Do you mean something like:
>
> template<typename T> void (*a)(T, T);
> template<> __attribute__((arm_streaming)) void (*a<int>)(int, int);
>
> where calling `a<short>(0, 0)` and `a<int>(0, 0)` have different
> streaming-mode behaviour? If so, then that is the intent. The SME attributes
> behave similar to a calling convention attributes, with the difference that
> more than one attribute can be applied.
Yup, that's the scenario I was wondering about -- thanks for the answer (and I
see test coverage for the situation as well).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D127762/new/
https://reviews.llvm.org/D127762
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