Author: AdityaK Date: 2023-03-14T23:35:05-07:00 New Revision: 9d0e5e79b0f355218b2a64f0d54507b96adb71eb
URL: https://github.com/llvm/llvm-project/commit/9d0e5e79b0f355218b2a64f0d54507b96adb71eb DIFF: https://github.com/llvm/llvm-project/commit/9d0e5e79b0f355218b2a64f0d54507b96adb71eb.diff LOG: [RISCV] Reserve X18 by default for Android Reserve X18 even when -fsanitize=shadow-call-stack is not enabled. Based on: https://reviews.llvm.org/D143355 Reviewed by: asb, samitolvanen, phosek, MaskRay Differential Revision: https://reviews.llvm.org/D145999 Added: Modified: clang/test/Driver/sanitizer-ld.c llvm/lib/TargetParser/RISCVTargetParser.cpp llvm/test/CodeGen/RISCV/reserved-regs.ll Removed: ################################################################################ diff --git a/clang/test/Driver/sanitizer-ld.c b/clang/test/Driver/sanitizer-ld.c index 910b0ed4ff0de..0778a96ae2350 100644 --- a/clang/test/Driver/sanitizer-ld.c +++ b/clang/test/Driver/sanitizer-ld.c @@ -743,6 +743,10 @@ // RUN: | FileCheck --check-prefix=CHECK-SHADOWCALLSTACK-LINUX-RISCV64 %s // CHECK-SHADOWCALLSTACK-LINUX-RISCV64: '-fsanitize=shadow-call-stack' only allowed with '-ffixed-x18' +// RUN: %clang -target riscv64-linux-android -fsanitize=shadow-call-stack %s -### 2>&1 \ +// RUN: | FileCheck %s --check-prefix=CHECK-SHADOWCALLSTACK-ANDROID-RISCV64 +// CHECK-SHADOWCALLSTACK-ANDROID-RISCV64-NOT: error: + // RUN: %clang -fsanitize=shadow-call-stack -### %s 2>&1 \ // RUN: --target=riscv64-unknown-fuchsia -fuse-ld=ld \ // RUN: | FileCheck --check-prefix=CHECK-SHADOWCALLSTACK-FUCHSIA-RISCV64 %s diff --git a/llvm/lib/TargetParser/RISCVTargetParser.cpp b/llvm/lib/TargetParser/RISCVTargetParser.cpp index 933a82b7c6cb2..3445e339ac606 100644 --- a/llvm/lib/TargetParser/RISCVTargetParser.cpp +++ b/llvm/lib/TargetParser/RISCVTargetParser.cpp @@ -103,7 +103,7 @@ bool getCPUFeaturesExceptStdExt(CPUKind Kind, bool isX18ReservedByDefault(const Triple &TT) { // X18 is reserved for the ShadowCallStack ABI (even when not enabled). - return TT.isOSFuchsia(); + return TT.isOSFuchsia() || TT.isAndroid(); } } // namespace RISCV diff --git a/llvm/test/CodeGen/RISCV/reserved-regs.ll b/llvm/test/CodeGen/RISCV/reserved-regs.ll index da549c0ad3033..68c6a6558eccc 100644 --- a/llvm/test/CodeGen/RISCV/reserved-regs.ll +++ b/llvm/test/CodeGen/RISCV/reserved-regs.ll @@ -58,6 +58,7 @@ ; RUN: llc -mtriple=riscv64 -mattr=+reserve-x31 -verify-machineinstrs < %s | FileCheck %s -check-prefix=X31 ; RUN: llc -mtriple=riscv64-fuchsia -verify-machineinstrs < %s | FileCheck %s -check-prefix=X18 +; RUN: llc -mtriple=riscv64-linux-android -verify-machineinstrs < %s | FileCheck %s -check-prefix=X18 ; This program is free to use all registers, but needs a stack pointer for ; spill values, so do not test for reserving the stack pointer. _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits