4vtomat updated this revision to Diff 508475.
4vtomat added a comment.

Resolved Craig's comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D146054/new/

https://reviews.llvm.org/D146054

Files:
  clang/include/clang/Driver/Options.td
  clang/include/clang/Frontend/FrontendOptions.h
  clang/lib/Driver/Driver.cpp
  clang/test/Driver/print-supported-marchs.c
  clang/tools/driver/cc1_main.cpp
  llvm/include/llvm/Support/RISCVISAInfo.h
  llvm/lib/Support/RISCVISAInfo.cpp

Index: llvm/lib/Support/RISCVISAInfo.cpp
===================================================================
--- llvm/lib/Support/RISCVISAInfo.cpp
+++ llvm/lib/Support/RISCVISAInfo.cpp
@@ -139,6 +139,29 @@
     {"ztso", RISCVExtensionVersion{0, 1}},
 };
 
+void llvm::riscvMarchHelp() {
+  errs() << "All available -march extensions for RISC-V\n\n";
+  errs() << '\t' << left_justify("Name", 20) << "Version\n";
+
+  RISCVISAInfo::OrderedExtensionMap ExtMap;
+  for (const auto &E : SupportedExtensions)
+    ExtMap[E.Name] = { E.Name, E.Version.Major, E.Version.Minor };
+  for (const auto &E : ExtMap)
+    errs() << format("\t%-20s%d.%d\n", E.first.c_str(), E.second.MajorVersion,
+                     E.second.MinorVersion);
+
+  errs() << "\nExperimental extensions\n";
+  ExtMap.clear();
+  for (const auto &E : SupportedExperimentalExtensions)
+    ExtMap[E.Name] = { E.Name, E.Version.Major, E.Version.Minor };
+  for (const auto &E : ExtMap)
+    errs() << format("\t%-20s%d.%d\n", E.first.c_str(), E.second.MajorVersion,
+                     E.second.MinorVersion);
+
+  errs() << "\nUse -march to specify the target's extension.\n"
+            "For example, clang -march=rv32i_v1p0\n";
+}
+
 static bool stripExperimentalPrefix(StringRef &Ext) {
   return Ext.consume_front("experimental-");
 }
Index: llvm/include/llvm/Support/RISCVISAInfo.h
===================================================================
--- llvm/include/llvm/Support/RISCVISAInfo.h
+++ llvm/include/llvm/Support/RISCVISAInfo.h
@@ -23,6 +23,8 @@
   unsigned MinorVersion;
 };
 
+void riscvMarchHelp();
+
 class RISCVISAInfo {
 public:
   RISCVISAInfo(const RISCVISAInfo &) = delete;
Index: clang/tools/driver/cc1_main.cpp
===================================================================
--- clang/tools/driver/cc1_main.cpp
+++ clang/tools/driver/cc1_main.cpp
@@ -38,6 +38,7 @@
 #include "llvm/Support/ManagedStatic.h"
 #include "llvm/Support/Path.h"
 #include "llvm/Support/Process.h"
+#include "llvm/Support/RISCVISAInfo.h"
 #include "llvm/Support/Signals.h"
 #include "llvm/Support/TargetSelect.h"
 #include "llvm/Support/TimeProfiler.h"
@@ -182,6 +183,14 @@
   return 0;
 }
 
+/// Print supported extensions of the given target.
+static int PrintSupportedExtensions(std::string TargetStr) {
+  llvm::riscvMarchHelp();
+
+  return 0;
+}
+
+
 int cc1_main(ArrayRef<const char *> Argv, const char *Argv0, void *MainAddr) {
   ensureSufficientStack();
 
@@ -223,6 +232,10 @@
   if (Clang->getFrontendOpts().PrintSupportedCPUs)
     return PrintSupportedCPUs(Clang->getTargetOpts().Triple);
 
+  // --print-supported-extensions takes priority over the actual compilation.
+  if (Clang->getFrontendOpts().PrintSupportedExtensions)
+    return PrintSupportedExtensions(Clang->getTargetOpts().Triple);
+
   // Infer the builtin include path if unspecified.
   if (Clang->getHeaderSearchOpts().UseBuiltinIncludes &&
       Clang->getHeaderSearchOpts().ResourceDir.empty())
Index: clang/test/Driver/print-supported-marchs.c
===================================================================
--- /dev/null
+++ clang/test/Driver/print-supported-marchs.c
@@ -0,0 +1,98 @@
+// Test that --print-supported-extensions lists supported extensions.
+
+// REQUIRES: riscv-registered-target
+
+// RUN: %clang --target=riscv64 --print-supported-extensions 2>&1 | \
+// RUN:   FileCheck %s --check-prefix=CHECK-RISCV
+
+// Test -march=help alias.
+// RUN: %clang --target=riscv64 -march=help 2>&1 | \
+// RUN:   FileCheck %s --check-prefix=CHECK-RISCV
+
+// CHECK-NOT: warning: argument unused during compilation
+// CHECK-RISCV: Target: riscv64
+// CHECK-NEXT: All available -march extensions for RISC-V
+// CHECK-NEXT: 	Name                Version
+// CHECK-NEXT: 	i                   2.0
+// CHECK-NEXT: 	e                   1.9
+// CHECK-NEXT: 	m                   2.0
+// CHECK-NEXT: 	a                   2.0
+// CHECK-NEXT: 	f                   2.0
+// CHECK-NEXT: 	d                   2.0
+// CHECK-NEXT: 	c                   2.0
+// CHECK-NEXT: 	v                   1.0
+// CHECK-NEXT: 	h                   1.0
+// CHECK-NEXT: 	svinval             1.0
+// CHECK-NEXT: 	svnapot             1.0
+// CHECK-NEXT: 	svpbmt              1.0
+// CHECK-NEXT: 	zicbom              1.0
+// CHECK-NEXT: 	zicbop              1.0
+// CHECK-NEXT: 	zicboz              1.0
+// CHECK-NEXT: 	zicsr               2.0
+// CHECK-NEXT: 	zifencei            2.0
+// CHECK-NEXT: 	zihintpause         2.0
+// CHECK-NEXT: 	zmmul               1.0
+// CHECK-NEXT: 	zawrs               1.0
+// CHECK-NEXT: 	zfh                 1.0
+// CHECK-NEXT: 	zfhmin              1.0
+// CHECK-NEXT: 	zfinx               1.0
+// CHECK-NEXT: 	zdinx               1.0
+// CHECK-NEXT: 	zba                 1.0
+// CHECK-NEXT: 	zbb                 1.0
+// CHECK-NEXT: 	zbc                 1.0
+// CHECK-NEXT: 	zbkb                1.0
+// CHECK-NEXT: 	zbkc                1.0
+// CHECK-NEXT: 	zbkx                1.0
+// CHECK-NEXT: 	zbs                 1.0
+// CHECK-NEXT: 	zk                  1.0
+// CHECK-NEXT: 	zkn                 1.0
+// CHECK-NEXT: 	zknd                1.0
+// CHECK-NEXT: 	zkne                1.0
+// CHECK-NEXT: 	zknh                1.0
+// CHECK-NEXT: 	zkr                 1.0
+// CHECK-NEXT: 	zks                 1.0
+// CHECK-NEXT: 	zksed               1.0
+// CHECK-NEXT: 	zksh                1.0
+// CHECK-NEXT: 	zkt                 1.0
+// CHECK-NEXT: 	zve32f              1.0
+// CHECK-NEXT: 	zve32x              1.0
+// CHECK-NEXT: 	zve64d              1.0
+// CHECK-NEXT: 	zve64f              1.0
+// CHECK-NEXT: 	zve64x              1.0
+// CHECK-NEXT: 	zvl1024b            1.0
+// CHECK-NEXT: 	zvl128b             1.0
+// CHECK-NEXT: 	zvl16384b           1.0
+// CHECK-NEXT: 	zvl2048b            1.0
+// CHECK-NEXT: 	zvl256b             1.0
+// CHECK-NEXT: 	zvl32768b           1.0
+// CHECK-NEXT: 	zvl32b              1.0
+// CHECK-NEXT: 	zvl4096b            1.0
+// CHECK-NEXT: 	zvl512b             1.0
+// CHECK-NEXT: 	zvl64b              1.0
+// CHECK-NEXT: 	zvl65536b           1.0
+// CHECK-NEXT: 	zvl8192b            1.0
+// CHECK-NEXT: 	zhinx               1.0
+// CHECK-NEXT: 	zhinxmin            1.0
+// CHECK-NEXT: 	xtheadba            1.0
+// CHECK-NEXT: 	xtheadbb            1.0
+// CHECK-NEXT: 	xtheadbs            1.0
+// CHECK-NEXT: 	xtheadcmo           1.0
+// CHECK-NEXT: 	xtheadcondmov       1.0
+// CHECK-NEXT: 	xtheadfmemidx       1.0
+// CHECK-NEXT: 	xtheadmac           1.0
+// CHECK-NEXT: 	xtheadmemidx        1.0
+// CHECK-NEXT: 	xtheadmempair       1.0
+// CHECK-NEXT: 	xtheadsync          1.0
+// CHECK-NEXT: 	xtheadvdot          1.0
+// CHECK-NEXT: 	xventanacondops     1.0
+// CHECK-NEXT: Experimental extensions
+// CHECK-NEXT: 	zihintntl           0.2
+// CHECK-NEXT: 	zfa                 0.1
+// CHECK-NEXT: 	zca                 1.0
+// CHECK-NEXT: 	zcb                 1.0
+// CHECK-NEXT: 	zcd                 1.0
+// CHECK-NEXT: 	zcf                 1.0
+// CHECK-NEXT: 	ztso                0.1
+// CHECK-NEXT: 	zvfh                0.1
+// CHECK-NEXT: Use -march to specify the target's extension.
+// CHECK-NEXT: For example, clang -march=rv32i_v1p0
Index: clang/lib/Driver/Driver.cpp
===================================================================
--- clang/lib/Driver/Driver.cpp
+++ clang/lib/Driver/Driver.cpp
@@ -2090,7 +2090,8 @@
 
   if (C.getArgs().hasArg(options::OPT_v) ||
       C.getArgs().hasArg(options::OPT__HASH_HASH_HASH) ||
-      C.getArgs().hasArg(options::OPT_print_supported_cpus)) {
+      C.getArgs().hasArg(options::OPT_print_supported_cpus) ||
+      C.getArgs().hasArg(options::OPT_print_supported_extensions)) {
     PrintVersion(C, llvm::errs());
     SuppressMissingInputWarning = true;
   }
@@ -4223,6 +4224,24 @@
       I.second->claim();
   }
 
+  // If --print-supported-extensions or -march=help is specified, call the helper
+  // function RISCVMarchHelp in RISCVISAInfo.cpp that prints out supported
+  // extensions and quits.
+  if (Arg *A = Args.getLastArg(options::OPT_print_supported_extensions)) {
+    if (!C.getDefaultToolChain().getTriple().isRISCV()) {
+      llvm::errs() << "-march=help is only supported for RISC-V.\n";
+      return;
+    }
+
+    // Use the -march=help flag as the dummy input to cc1.
+    Actions.clear();
+    Action *InputAc = C.MakeAction<InputAction>(*A, types::TY_C);
+    Actions.push_back(
+        C.MakeAction<PrecompileJobAction>(InputAc, types::TY_Nothing));
+    for (auto &I : Inputs)
+      I.second->claim();
+  }
+
   // Call validator for dxil when -Vd not in Args.
   if (C.getDefaultToolChain().getTriple().isDXIL()) {
     // Only add action when needValidation.
Index: clang/include/clang/Frontend/FrontendOptions.h
===================================================================
--- clang/include/clang/Frontend/FrontendOptions.h
+++ clang/include/clang/Frontend/FrontendOptions.h
@@ -281,6 +281,9 @@
   /// print the supported cpus for the current target
   unsigned PrintSupportedCPUs : 1;
 
+  /// print the supported extensions for the current target
+  unsigned PrintSupportedExtensions : 1;
+
   /// Output time trace profile.
   unsigned TimeTrace : 1;
 
Index: clang/include/clang/Driver/Options.td
===================================================================
--- clang/include/clang/Driver/Options.td
+++ clang/include/clang/Driver/Options.td
@@ -4343,8 +4343,13 @@
   HelpText<"Print supported cpu models for the given target (if target is not specified,"
            " it will print the supported cpus for the default target)">,
   MarshallingInfoFlag<FrontendOpts<"PrintSupportedCPUs">>;
+def print_supported_extensions : Flag<["-", "--"], "print-supported-extensions">,
+  Group<CompileOnly_Group>, Flags<[CC1Option, CoreOption]>,
+  HelpText<"Print supported extensions for RISC-V">,
+  MarshallingInfoFlag<FrontendOpts<"PrintSupportedExtensions">>;
 def : Flag<["-"], "mcpu=help">, Alias<print_supported_cpus>;
 def : Flag<["-"], "mtune=help">, Alias<print_supported_cpus>;
+def : Flag<["-"], "march=help">, Alias<print_supported_extensions>;
 def time : Flag<["-"], "time">,
   HelpText<"Time individual commands">;
 def traditional_cpp : Flag<["-", "--"], "traditional-cpp">, Flags<[CC1Option]>,
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