bryanpkc updated this revision to Diff 532431.
bryanpkc marked 3 inline comments as done.
bryanpkc added a comment.
Rebased. NFC.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134677/new/
https://reviews.llvm.org/D134677
Files:
clang/include/clang/Basic/arm_sme.td
clang/include/clang/Basic/arm_sve_sme_incl.td
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/CodeGen/CodeGenFunction.h
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
Index: clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
===================================================================
--- clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
+++ clang/test/Sema/aarch64-sme-intrinsics/acle_sme_imm.cpp
@@ -14,8 +14,10 @@
#ifdef DISABLE_SME_ATTRIBUTES
#define ARM_STREAMING_ATTR
+#define ARM_SHARED_ZA_ATTR
#else
#define ARM_STREAMING_ATTR __attribute__((arm_streaming))
+#define ARM_SHARED_ZA_ATTR __attribute__((arm_shared_za))
#endif
ARM_STREAMING_ATTR
@@ -203,6 +205,14 @@
SVE_ACLE_FUNC(svwrite_ver_za8, _s8, _m,)(0, -1, 16, pg, svundef_s8());
}
+ARM_SHARED_ZA_ATTR
+void test_range_0_255(svbool_t pg, void *ptr) {
+ // expected-error@+1 {{argument value 256 is outside the valid range [0, 255]}}
+ SVE_ACLE_FUNC(svzero_mask_za,,,)(256);
+ // expected-error@+1 {{argument value 18446744073709551615 is outside the valid range [0, 255]}}
+ SVE_ACLE_FUNC(svzero_mask_za,,,)(-1);
+}
+
ARM_STREAMING_ATTR
void test_constant(uint64_t u64, svbool_t pg, void *ptr) {
SVE_ACLE_FUNC(svld1_hor_za8,,,)(u64, u64, 0, pg, ptr); // expected-error {{argument to 'svld1_hor_za8' must be a constant integer}}
Index: clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_zero.c
@@ -0,0 +1,52 @@
+// REQUIRES: aarch64-registered-target
+// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
+// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
+// RUN: %clang_cc1 -DDISABLE_SME_ATTRIBUTES -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
+
+#include <arm_sme_draft_spec_subject_to_change.h>
+
+#ifdef DISABLE_SME_ATTRIBUTES
+#define ARM_SHARED_ZA_ATTR
+#else
+#define ARM_SHARED_ZA_ATTR __attribute__((arm_shared_za))
+#endif
+
+// CHECK-C-LABEL: @test_svzero_mask_za(
+// CHECK-CXX-LABEL: @_Z19test_svzero_mask_zav(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 0)
+// CHECK-NEXT: ret void
+//
+ARM_SHARED_ZA_ATTR void test_svzero_mask_za() {
+ svzero_mask_za(0);
+}
+
+// CHECK-C-LABEL: @test_svzero_mask_za_1(
+// CHECK-CXX-LABEL: @_Z21test_svzero_mask_za_1v(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 176)
+// CHECK-NEXT: ret void
+//
+ARM_SHARED_ZA_ATTR void test_svzero_mask_za_1() {
+ svzero_mask_za(176);
+}
+
+// CHECK-C-LABEL: @test_svzero_mask_za_2(
+// CHECK-CXX-LABEL: @_Z21test_svzero_mask_za_2v(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255)
+// CHECK-NEXT: ret void
+//
+ARM_SHARED_ZA_ATTR void test_svzero_mask_za_2() {
+ svzero_mask_za(255);
+}
+
+// CHECK-C-LABEL: @test_svzero_za(
+// CHECK-CXX-LABEL: @_Z14test_svzero_zav(
+// CHECK-NEXT: entry:
+// CHECK-NEXT: tail call void @llvm.aarch64.sme.zero(i32 255)
+// CHECK-NEXT: ret void
+//
+ARM_SHARED_ZA_ATTR void test_svzero_za() {
+ svzero_za();
+}
Index: clang/lib/Sema/SemaChecking.cpp
===================================================================
--- clang/lib/Sema/SemaChecking.cpp
+++ clang/lib/Sema/SemaChecking.cpp
@@ -2995,6 +2995,10 @@
if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 15))
HasError = true;
break;
+ case SVETypeFlags::ImmCheck0_255:
+ if (SemaBuiltinConstantArgRange(TheCall, ArgNum, 0, 255))
+ HasError = true;
+ break;
}
}
Index: clang/lib/CodeGen/CodeGenFunction.h
===================================================================
--- clang/lib/CodeGen/CodeGenFunction.h
+++ clang/lib/CodeGen/CodeGenFunction.h
@@ -4266,6 +4266,9 @@
llvm::Value *EmitSMEReadWrite(SVETypeFlags TypeFlags,
llvm::SmallVectorImpl<llvm::Value *> &Ops,
unsigned IntID);
+ llvm::Value *EmitSMEZero(SVETypeFlags TypeFlags,
+ llvm::SmallVectorImpl<llvm::Value *> &Ops,
+ unsigned IntID);
llvm::Value *EmitAArch64SMEBuiltinExpr(unsigned BuiltinID, const CallExpr *E);
llvm::Value *EmitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
Index: clang/lib/CodeGen/CGBuiltin.cpp
===================================================================
--- clang/lib/CodeGen/CGBuiltin.cpp
+++ clang/lib/CodeGen/CGBuiltin.cpp
@@ -9464,6 +9464,16 @@
return Builder.CreateCall(F, Ops);
}
+Value *CodeGenFunction::EmitSMEZero(SVETypeFlags TypeFlags,
+ SmallVectorImpl<Value *> &Ops,
+ unsigned IntID) {
+ // svzero_za() intrinsic zeros the entire za tile and has no paramters.
+ if (Ops.size() == 0)
+ Ops.push_back(llvm::ConstantInt::get(Int32Ty, 255));
+ Function *F = CGM.getIntrinsic(IntID, {});
+ return Builder.CreateCall(F, Ops);
+}
+
// Limit the usage of scalable llvm IR generated by the ACLE by using the
// sve dup.x intrinsic instead of IRBuilder::CreateVectorSplat.
Value *CodeGenFunction::EmitSVEDupX(Value *Scalar, llvm::Type *Ty) {
@@ -9924,6 +9934,9 @@
return EmitSMELd1St1(TypeFlags, Ops, Builtin->LLVMIntrinsic);
else if (TypeFlags.isReadZA() || TypeFlags.isWriteZA())
return EmitSMEReadWrite(TypeFlags, Ops, Builtin->LLVMIntrinsic);
+ else if (BuiltinID == SME::BI__builtin_sme_svzero_mask_za ||
+ BuiltinID == SME::BI__builtin_sme_svzero_za)
+ return EmitSMEZero(TypeFlags, Ops, Builtin->LLVMIntrinsic);
/// Should not happen
return nullptr;
Index: clang/include/clang/Basic/arm_sve_sme_incl.td
===================================================================
--- clang/include/clang/Basic/arm_sve_sme_incl.td
+++ clang/include/clang/Basic/arm_sve_sme_incl.td
@@ -241,6 +241,7 @@
def ImmCheck0_3 : ImmCheckType<15>; // 0..3
def ImmCheck0_0 : ImmCheckType<16>; // 0..0
def ImmCheck0_15 : ImmCheckType<17>; // 0..15
+def ImmCheck0_255 : ImmCheckType<18>; // 0..255
class ImmCheck<int arg, ImmCheckType kind, int eltSizeArg = -1> {
int Arg = arg;
Index: clang/include/clang/Basic/arm_sme.td
===================================================================
--- clang/include/clang/Basic/arm_sme.td
+++ clang/include/clang/Basic/arm_sme.td
@@ -114,3 +114,14 @@
defm SVWRITE_ZA32 : ZAWrite<"za32", "iUif", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_3>, ImmCheck<2, ImmCheck0_3>]>;
defm SVWRITE_ZA64 : ZAWrite<"za64", "lUld", "aarch64_sme_write", [ImmCheck<0, ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>;
defm SVWRITE_ZA128 : ZAWrite<"za128", "csilUcUsUiUlhbfd", "aarch64_sme_writeq", [ImmCheck<0, ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>;
+
+////////////////////////////////////////////////////////////////////////////////
+// SME - Zero
+
+let TargetGuard = "sme" in {
+ def SVZERO_MASK_ZA : SInst<"svzero_mask_za", "vi", "", MergeNone, "aarch64_sme_zero",
+ [IsOverloadNone, IsStreamingCompatible, IsSharedZA],
+ [ImmCheck<0, ImmCheck0_255>]>;
+ def SVZERO_ZA : SInst<"svzero_za", "v", "", MergeNone, "aarch64_sme_zero",
+ [IsOverloadNone, IsStreamingCompatible, IsSharedZA]>;
+}
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