This revision was automatically updated to reflect the committed changes. Closed by commit rG9ed668ad9321: [RISCV] Model vxrm control for vsmul, vssra, vssrl, vnclip, and vnclipu (authored by eopXD).
Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152879/new/ https://reviews.llvm.org/D152879 Files: clang/include/clang/Basic/riscv_vector.td clang/lib/Sema/SemaChecking.cpp clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclip.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vnclipu.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vsmul.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssra.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/non-overloaded/vssrl.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vnclip.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vnclipu.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vsmul.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssra.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/vssrl.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclip.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vnclipu.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vsmul.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssra.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/vssrl.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vnclip.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vnclipu.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vsmul.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vssra.c clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/vssrl.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vnclip-out-of-range.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vnclipu-out-of-range.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-eew64-overloaded.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-eew64.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vsmul-out-of-range.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vssra-out-of-range.c clang/test/CodeGen/RISCV/rvv-intrinsics-handcrafted/vssrl-out-of-range.c llvm/include/llvm/IR/IntrinsicsRISCV.td llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td llvm/test/CodeGen/RISCV/rvv/masked-tama.ll llvm/test/CodeGen/RISCV/rvv/masked-tamu.ll llvm/test/CodeGen/RISCV/rvv/masked-tuma.ll llvm/test/CodeGen/RISCV/rvv/masked-tumu.ll llvm/test/CodeGen/RISCV/rvv/mutate-prior-vsetvli-avl.ll llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll llvm/test/CodeGen/RISCV/rvv/vnclip.ll llvm/test/CodeGen/RISCV/rvv/vnclipu.ll llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll llvm/test/CodeGen/RISCV/rvv/vsmul-rv64.ll llvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll llvm/test/CodeGen/RISCV/rvv/vssra-rv64.ll llvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll llvm/test/CodeGen/RISCV/rvv/vssrl-rv64.ll _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
