This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG43baa5986c20: Pre-commit test for D151696. (authored by 
FreddyYe).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152989/new/

https://reviews.llvm.org/D152989

Files:
  clang/test/CodeGen/attr-cpuspecific-cpus.c
  clang/test/CodeGen/attr-cpuspecific.c

Index: clang/test/CodeGen/attr-cpuspecific.c
===================================================================
--- clang/test/CodeGen/attr-cpuspecific.c
+++ clang/test/CodeGen/attr-cpuspecific.c
@@ -5,7 +5,7 @@
 #define ATTR(X) __declspec(X)
 #else
 #define ATTR(X) __attribute__((X))
-#endif // _MSC_VER
+#endif // _WIN64
 
 // Each version should have an IFunc and an alias.
 // LINUX: @SingleVersion = weak_odr alias void (), ptr @SingleVersion.ifunc
@@ -43,12 +43,18 @@
 void SingleVersion(void);
 // LINUX: define weak_odr ptr @SingleVersion.resolver()
 // LINUX: call void @__cpu_indicator_init
+// LINUX: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// LINUX: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 1023
+// LINUX: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 1023
 // LINUX: ret ptr @SingleVersion.S
 // LINUX: call void @llvm.trap
 // LINUX: unreachable
 
 // WINDOWS: define weak_odr dso_local void @SingleVersion() comdat
 // WINDOWS: call void @__cpu_indicator_init()
+// WINDOWS: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// WINDOWS: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 1023
+// WINDOWS: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 1023
 // WINDOWS: call void @SingleVersion.S()
 // WINDOWS-NEXT: ret void
 // WINDOWS: call void @llvm.trap
@@ -67,6 +73,9 @@
 void TwoVersions(void);
 // LINUX: define weak_odr ptr @TwoVersions.resolver()
 // LINUX: call void @__cpu_indicator_init
+// LINUX: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// LINUX: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 58836991
+// LINUX: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 58836991
 // LINUX: ret ptr @TwoVersions.Z
 // LINUX: ret ptr @TwoVersions.S
 // LINUX: call void @llvm.trap
@@ -74,6 +83,9 @@
 
 // WINDOWS: define weak_odr dso_local void @TwoVersions() comdat
 // WINDOWS: call void @__cpu_indicator_init()
+// WINDOWS: %[[FEAT_INIT:.+]] = load i32, ptr getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, ptr @__cpu_model, i32 0, i32 3, i32 0), align 4
+// WINDOWS: %[[FEAT_JOIN:.+]] = and i32 %[[FEAT_INIT]], 58836991
+// WINDOWS: %[[FEAT_CHECK:.+]] = icmp eq i32 %[[FEAT_JOIN]], 58836991
 // WINDOWS: call void @TwoVersions.Z()
 // WINDOWS-NEXT: ret void
 // WINDOWS: call void @TwoVersions.S()
Index: clang/test/CodeGen/attr-cpuspecific-cpus.c
===================================================================
--- /dev/null
+++ clang/test/CodeGen/attr-cpuspecific-cpus.c
@@ -0,0 +1,47 @@
+// RUN: %clang_cc1 -verify -triple x86_64-linux-gnu -emit-llvm -o - %s
+// RUN: %clang_cc1 -verify -triple x86_64-windows-pc -fms-compatibility -emit-llvm -o - %s
+
+// expected-no-diagnostics
+
+#ifdef _WIN64
+#define ATTR(X) __declspec(X)
+#else
+#define ATTR(X) __attribute__((X))
+#endif // _WIN64
+
+ATTR(cpu_specific(generic)) void CPU(void){}
+ATTR(cpu_specific(pentium)) void CPU(void){}
+ATTR(cpu_specific(pentium_pro)) void CPU(void){}
+ATTR(cpu_specific(pentium_mmx)) void CPU(void){}
+ATTR(cpu_specific(pentium_ii)) void CPU(void){}
+ATTR(cpu_specific(pentium_iii)) void CPU(void){}
+ATTR(cpu_specific(pentium_4)) void CPU(void){}
+ATTR(cpu_specific(pentium_m)) void CPU(void){}
+ATTR(cpu_specific(pentium_4_sse3)) void CPU(void){}
+ATTR(cpu_specific(core_2_duo_ssse3)) void CPU(void){}
+ATTR(cpu_specific(core_2_duo_sse4_1)) void CPU(void){}
+ATTR(cpu_specific(atom)) void CPU(void){}
+ATTR(cpu_specific(atom_sse4_2)) void CPU(void){}
+ATTR(cpu_specific(core_i7_sse4_2)) void CPU(void){}
+ATTR(cpu_specific(core_aes_pclmulqdq)) void CPU(void){}
+ATTR(cpu_specific(atom_sse4_2_movbe)) void CPU(void){}
+ATTR(cpu_specific(goldmont)) void CPU(void){}
+ATTR(cpu_specific(sandybridge)) void CPU(void){}
+ATTR(cpu_specific(ivybridge)) void CPU(void){}
+ATTR(cpu_specific(haswell)) void CPU(void){}
+ATTR(cpu_specific(core_4th_gen_avx_tsx)) void CPU(void){}
+ATTR(cpu_specific(broadwell)) void CPU(void){}
+ATTR(cpu_specific(core_5th_gen_avx_tsx)) void CPU(void){}
+ATTR(cpu_specific(knl)) void CPU(void){}
+ATTR(cpu_specific(skylake)) void CPU(void){}
+ATTR(cpu_specific(skylake_avx512)) void CPU(void){}
+ATTR(cpu_specific(cannonlake)) void CPU(void){}
+ATTR(cpu_specific(knm)) void CPU(void){}
+
+// ALIAS CPUs
+ATTR(cpu_specific(pentium_iii_no_xmm_regs)) void CPU0(void){}
+ATTR(cpu_specific(core_2nd_gen_avx)) void CPU1(void){}
+ATTR(cpu_specific(core_3rd_gen_avx)) void CPU2(void){}
+ATTR(cpu_specific(core_4th_gen_avx)) void CPU3(void){}
+ATTR(cpu_specific(core_5th_gen_avx)) void CPU4(void){}
+ATTR(cpu_specific(mic_avx512)) void CPU5(void){}
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