craig.topper added inline comments.
================
Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8303
+ def rr : I<opc, MRMSrcReg, (outs VR128:$dst),
+ (ins VR128:$src1, VR128:$src2, VR128:$src3),
+ !strconcat(OpcodeStr, "\t{$src3, $src2, $dst|$dst, $src2,
$src3}"),
----------------
This needs to be indented 1 character more
================
Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8306
+ [(set VR128:$dst,
+ (v4i32 (!cast<Intrinsic>("int_x86_avx2_"#OpcodeStr#"_128")
+ VR128:$src1, VR128:$src2, VR128:$src3)))]>,
----------------
This needs to be indented 1 character more so that it looks nested under the
`set`
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D155145/new/
https://reviews.llvm.org/D155145
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