agutowski created this revision.
agutowski added reviewers: rnk, thakis, compnerd, majnemer.
agutowski added a subscriber: cfe-commits.
https://reviews.llvm.org/D24330
Files:
include/clang/Basic/Builtins.def
include/clang/Basic/BuiltinsX86.def
lib/AST/ExprConstant.cpp
lib/CodeGen/CGBuiltin.cpp
lib/Headers/emmintrin.h
lib/Headers/ia32intrin.h
lib/Headers/intrin.h
lib/Headers/xmmintrin.h
test/CodeGen/builtins-x86.c
test/Sema/constant-builtins-2.c
test/Sema/constant-builtins.c
Index: lib/Headers/ia32intrin.h
===================================================================
--- lib/Headers/ia32intrin.h
+++ lib/Headers/ia32intrin.h
@@ -60,12 +60,6 @@
return __builtin_ia32_rdpmc(__A);
}
-/* __rdtsc */
-static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
-__rdtsc(void) {
- return __builtin_ia32_rdtsc();
-}
-
/* __rdtscp */
static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__))
__rdtscp(unsigned int *__A) {
Index: lib/Headers/emmintrin.h
===================================================================
--- lib/Headers/emmintrin.h
+++ lib/Headers/emmintrin.h
@@ -2447,52 +2447,6 @@
}
#endif
-/// \brief The cache line containing __p is flushed and invalidated from all
-/// caches in the coherency domain.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c CLFLUSH instruction.
-///
-/// \param __p
-/// A pointer to the memory location used to identify the cache line to be
-/// flushed.
-static __inline__ void __DEFAULT_FN_ATTRS
-_mm_clflush(void const *__p)
-{
- __builtin_ia32_clflush(__p);
-}
-
-/// \brief Forces strong memory ordering (serialization) between load
-/// instructions preceding this instruction and load instructions following
-/// this instruction, ensuring the system completes all previous loads before
-/// executing subsequent loads.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c LFENCE instruction.
-///
-static __inline__ void __DEFAULT_FN_ATTRS
-_mm_lfence(void)
-{
- __builtin_ia32_lfence();
-}
-
-/// \brief Forces strong memory ordering (serialization) between load and store
-/// instructions preceding this instruction and load and store instructions
-/// following this instruction, ensuring that the system completes all
-/// previous memory accesses before executing subsequent memory accesses.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c MFENCE instruction.
-///
-static __inline__ void __DEFAULT_FN_ATTRS
-_mm_mfence(void)
-{
- __builtin_ia32_mfence();
-}
-
/// \brief Converts 16-bit signed integers from both 128-bit integer vector
/// operands into 8-bit signed integers, and packs the results into the
/// destination. Positive values greater than 0x7F are saturated to 0x7F.
@@ -3206,19 +3160,6 @@
return (__m128d)__a;
}
-/// \brief Indicates that a spin loop is being executed for the purposes of
-/// optimizing power consumption during the loop.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c PAUSE instruction.
-///
-static __inline__ void __DEFAULT_FN_ATTRS
-_mm_pause(void)
-{
- __builtin_ia32_pause();
-}
-
#undef __DEFAULT_FN_ATTRS
#define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
Index: lib/Headers/intrin.h
===================================================================
--- lib/Headers/intrin.h
+++ lib/Headers/intrin.h
@@ -518,14 +518,6 @@
*_Index = 31 - __builtin_clzl(_Mask);
return 1;
}
-static __inline__ unsigned short __DEFAULT_FN_ATTRS
-__popcnt16(unsigned short _Value) {
- return __builtin_popcount((int)_Value);
-}
-static __inline__ unsigned int __DEFAULT_FN_ATTRS
-__popcnt(unsigned int _Value) {
- return __builtin_popcount(_Value);
-}
static __inline__ unsigned char __DEFAULT_FN_ATTRS
_bittest(long const *_BitBase, long _BitPos) {
return (*_BitBase >> _BitPos) & 1;
@@ -568,11 +560,6 @@
*_Index = 63 - __builtin_clzll(_Mask);
return 1;
}
-static __inline__
-unsigned __int64 __DEFAULT_FN_ATTRS
-__popcnt64(unsigned __int64 _Value) {
- return __builtin_popcountll(_Value);
-}
static __inline__ unsigned char __DEFAULT_FN_ATTRS
_bittest64(__int64 const *_BitBase, __int64 _BitPos) {
return (*_BitBase >> _BitPos) & 1;
Index: lib/Headers/xmmintrin.h
===================================================================
--- lib/Headers/xmmintrin.h
+++ lib/Headers/xmmintrin.h
@@ -2085,21 +2085,6 @@
__builtin_nontemporal_store((__v4sf)__a, (__v4sf*)__p);
}
-/// \brief Forces strong memory ordering (serialization) between store
-/// instructions preceding this instruction and store instructions following
-/// this instruction, ensuring the system completes all previous stores
-/// before executing subsequent stores.
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c SFENCE instruction.
-///
-static __inline__ void __DEFAULT_FN_ATTRS
-_mm_sfence(void)
-{
- __builtin_ia32_sfence();
-}
-
/// \brief Extracts 16-bit element from a 64-bit vector of [4 x i16] and
/// returns it, as specified by the immediate integer operand.
///
@@ -2376,86 +2361,6 @@
return (__m64)__builtin_ia32_psadbw((__v8qi)__a, (__v8qi)__b);
}
-/// \brief Returns the contents of the MXCSR register as a 32-bit unsigned
-/// integer value. There are several groups of macros associated with this
-/// intrinsic, including:
-/// * For checking exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO,
-/// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW,
-/// _MM_EXCEPT_INEXACT. There is a convenience wrapper
-/// _MM_GET_EXCEPTION_STATE().
-/// * For checking exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW,
-/// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT.
-/// There is a convenience wrapper _MM_GET_EXCEPTION_MASK().
-/// * For checking rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN,
-/// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper
-/// _MM_GET_ROUNDING_MODE(x) where x is one of these macros.
-/// * For checking flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF.
-/// There is a convenience wrapper _MM_GET_FLUSH_ZERO_MODE().
-/// * For checking denormals-are-zero mode: _MM_DENORMALS_ZERO_ON,
-/// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper
-/// _MM_GET_DENORMALS_ZERO_MODE().
-///
-/// For example, the expression below checks if an overflow exception has
-/// occurred:
-/// ( _mm_getcsr() & _MM_EXCEPT_OVERFLOW )
-///
-/// The following example gets the current rounding mode:
-/// _MM_GET_ROUNDING_MODE()
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c VSTMXCSR / STMXCSR instruction.
-///
-/// \returns A 32-bit unsigned integer containing the contents of the MXCSR
-/// register.
-static __inline__ unsigned int __DEFAULT_FN_ATTRS
-_mm_getcsr(void)
-{
- return __builtin_ia32_stmxcsr();
-}
-
-/// \brief Sets the MXCSR register with the 32-bit unsigned integer value. There
-/// are several groups of macros associated with this intrinsic, including:
-/// * For setting exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO,
-/// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW,
-/// _MM_EXCEPT_INEXACT. There is a convenience wrapper
-/// _MM_SET_EXCEPTION_STATE(x) where x is one of these macros.
-/// * For setting exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW,
-/// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT.
-/// There is a convenience wrapper _MM_SET_EXCEPTION_MASK(x) where x is one
-/// of these macros.
-/// * For setting rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN,
-/// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper
-/// _MM_SET_ROUNDING_MODE(x) where x is one of these macros.
-/// * For setting flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF.
-/// There is a convenience wrapper _MM_SET_FLUSH_ZERO_MODE(x) where x is
-/// one of these macros.
-/// * For setting denormals-are-zero mode: _MM_DENORMALS_ZERO_ON,
-/// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper
-/// _MM_SET_DENORMALS_ZERO_MODE(x) where x is one of these macros.
-///
-/// For example, the following expression causes subsequent floating-point
-/// operations to round up:
-/// _mm_setcsr(_mm_getcsr() | _MM_ROUND_UP)
-///
-/// The following example sets the DAZ and FTZ flags:
-/// void setFlags() {
-/// _MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_ON)
-/// _MM_SET_DENORMALS_ZERO_MODE(_MM_DENORMALS_ZERO_ON)
-/// }
-///
-/// \headerfile <x86intrin.h>
-///
-/// This intrinsic corresponds to the \c VLDMXCSR / LDMXCSR instruction.
-///
-/// \param __i
-/// A 32-bit unsigned integer value to be written to the MXCSR register.
-static __inline__ void __DEFAULT_FN_ATTRS
-_mm_setcsr(unsigned int __i)
-{
- __builtin_ia32_ldmxcsr(__i);
-}
-
/// \brief Selects 4 float values from the 128-bit operands of [4 x float], as
/// specified by the immediate value operand.
///
Index: lib/CodeGen/CGBuiltin.cpp
===================================================================
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -681,6 +681,9 @@
"cast");
return RValue::get(Result);
}
+ case Builtin::BI__popcnt16:
+ case Builtin::BI__popcnt:
+ case Builtin::BI__popcnt64:
case Builtin::BI__builtin_popcount:
case Builtin::BI__builtin_popcountl:
case Builtin::BI__builtin_popcountll: {
@@ -741,7 +744,10 @@
}
case Builtin::BI__builtin_bswap16:
case Builtin::BI__builtin_bswap32:
- case Builtin::BI__builtin_bswap64: {
+ case Builtin::BI__builtin_bswap64:
+ case Builtin::BI_byteswap_ushort:
+ case Builtin::BI_byteswap_ulong:
+ case Builtin::BI_byteswap_uint64: {
return RValue::get(emitUnaryBuiltin(*this, E, Intrinsic::bswap));
}
case Builtin::BI__builtin_bitreverse8:
@@ -6880,6 +6886,25 @@
Value *F = CGM.getIntrinsic(Intrinsic::prefetch);
return Builder.CreateCall(F, {Address, RW, Locality, Data});
}
+ case X86::BI_mm_clflush: {
+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_clflush),
+ Ops[0]);
+ }
+ case X86::BI_mm_lfence: {
+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_lfence));
+ }
+ case X86::BI_mm_mfence: {
+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_mfence));
+ }
+ case X86::BI_mm_sfence: {
+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_sfence));
+ }
+ case X86::BI_mm_pause: {
+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse2_pause));
+ }
+ case X86::BI__rdtsc: {
+ return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc));
+ }
case X86::BI__builtin_ia32_undef128:
case X86::BI__builtin_ia32_undef256:
case X86::BI__builtin_ia32_undef512:
@@ -6892,12 +6917,14 @@
case X86::BI__builtin_ia32_vec_ext_v2si:
return Builder.CreateExtractElement(Ops[0],
llvm::ConstantInt::get(Ops[1]->getType(), 0));
+ case X86::BI_mm_setcsr:
case X86::BI__builtin_ia32_ldmxcsr: {
Address Tmp = CreateMemTemp(E->getArg(0)->getType());
Builder.CreateStore(Ops[0], Tmp);
return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_ldmxcsr),
Builder.CreateBitCast(Tmp.getPointer(), Int8PtrTy));
}
+ case X86::BI_mm_getcsr:
case X86::BI__builtin_ia32_stmxcsr: {
Address Tmp = CreateMemTemp(E->getType());
Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_sse_stmxcsr),
Index: lib/AST/ExprConstant.cpp
===================================================================
--- lib/AST/ExprConstant.cpp
+++ lib/AST/ExprConstant.cpp
@@ -6893,7 +6893,10 @@
case Builtin::BI__builtin_bswap16:
case Builtin::BI__builtin_bswap32:
- case Builtin::BI__builtin_bswap64: {
+ case Builtin::BI__builtin_bswap64:
+ case Builtin::BI_byteswap_ushort:
+ case Builtin::BI_byteswap_ulong:
+ case Builtin::BI_byteswap_uint64: {
APSInt Val;
if (!EvaluateInteger(E->getArg(0), Val, Info))
return false;
@@ -7011,6 +7014,9 @@
return Success(Val.countPopulation() % 2, E);
}
+ case Builtin::BI__popcnt16:
+ case Builtin::BI__popcnt:
+ case Builtin::BI__popcnt64:
case Builtin::BI__builtin_popcount:
case Builtin::BI__builtin_popcountl:
case Builtin::BI__builtin_popcountll: {
Index: include/clang/Basic/BuiltinsX86.def
===================================================================
--- include/clang/Basic/BuiltinsX86.def
+++ include/clang/Basic/BuiltinsX86.def
@@ -301,7 +301,9 @@
TARGET_BUILTIN(__builtin_ia32_pabsd128, "V4iV4i", "", "ssse3")
TARGET_BUILTIN(__builtin_ia32_ldmxcsr, "vUi", "", "sse")
+TARGET_BUILTIN(_mm_setcsr, "vUi", "", "sse")
TARGET_BUILTIN(__builtin_ia32_stmxcsr, "Ui", "", "sse")
+TARGET_BUILTIN(_mm_getcsr, "Ui", "", "sse")
TARGET_BUILTIN(__builtin_ia32_cvtss2si, "iV4f", "", "sse")
TARGET_BUILTIN(__builtin_ia32_cvttss2si, "iV4f", "", "sse")
TARGET_BUILTIN(__builtin_ia32_cvtss2si64, "LLiV4f", "", "sse")
@@ -310,6 +312,7 @@
TARGET_BUILTIN(__builtin_ia32_storelps, "vV2i*V4f", "", "sse")
TARGET_BUILTIN(__builtin_ia32_movmskps, "iV4f", "", "sse")
TARGET_BUILTIN(__builtin_ia32_sfence, "v", "", "sse")
+TARGET_BUILTIN(_mm_sfence, "v", "", "sse")
TARGET_BUILTIN(__builtin_ia32_rcpps, "V4fV4f", "", "sse")
TARGET_BUILTIN(__builtin_ia32_rcpss, "V4fV4f", "", "sse")
TARGET_BUILTIN(__builtin_ia32_rsqrtps, "V4fV4f", "", "sse")
@@ -337,9 +340,13 @@
TARGET_BUILTIN(__builtin_ia32_cvtps2dq, "V4iV4f", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_cvttps2dq, "V4iV4f", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_clflush, "vvC*", "", "sse2")
+TARGET_BUILTIN(_mm_clflush, "vvC*", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_lfence, "v", "", "sse2")
+TARGET_BUILTIN(_mm_lfence, "v", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_mfence, "v", "", "sse2")
+TARGET_BUILTIN(_mm_mfence, "v", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_pause, "v", "", "sse2")
+TARGET_BUILTIN(_mm_pause, "v", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_pmuludq128, "V2LLiV4iV4i", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_psraw128, "V8sV8sV8s", "", "sse2")
TARGET_BUILTIN(__builtin_ia32_psrad128, "V4iV4iV4i", "", "sse2")
@@ -894,6 +901,7 @@
BUILTIN(__builtin_ia32_rdpmc, "ULLii", "")
BUILTIN(__builtin_ia32_rdtsc, "ULLi", "")
+BUILTIN(__rdtsc, "ULLi", "")
BUILTIN(__builtin_ia32_rdtscp, "ULLiUi*", "")
// PKU
TARGET_BUILTIN(__builtin_ia32_rdpkru, "Ui", "", "pku")
Index: include/clang/Basic/Builtins.def
===================================================================
--- include/clang/Basic/Builtins.def
+++ include/clang/Basic/Builtins.def
@@ -708,6 +708,9 @@
// Microsoft builtins. These are only active with -fms-extensions.
LANGBUILTIN(_alloca, "v*z", "n", ALL_MS_LANGUAGES)
LANGBUILTIN(__assume, "vb", "n", ALL_MS_LANGUAGES)
+LANGBUILTIN(_byteswap_ushort, "UsUs", "nc", ALL_MS_LANGUAGES)
+LANGBUILTIN(_byteswap_ulong, "ULiULi", "nc", ALL_MS_LANGUAGES)
+LANGBUILTIN(_byteswap_uint64, "ULLiULLi", "nc", ALL_MS_LANGUAGES)
LANGBUILTIN(__debugbreak, "v", "n", ALL_MS_LANGUAGES)
LANGBUILTIN(__exception_code, "ULi", "n", ALL_MS_LANGUAGES)
LANGBUILTIN(_exception_code, "ULi", "n", ALL_MS_LANGUAGES)
@@ -724,6 +727,9 @@
LANGBUILTIN(_InterlockedExchangePointer, "v*v*D*v*", "n", ALL_MS_LANGUAGES)
LANGBUILTIN(_InterlockedIncrement, "LiLiD*", "n", ALL_MS_LANGUAGES)
LANGBUILTIN(__noop, "i.", "n", ALL_MS_LANGUAGES)
+LANGBUILTIN(__popcnt16, "UsUs", "nc", ALL_MS_LANGUAGES)
+LANGBUILTIN(__popcnt, "UiUi", "nc", ALL_MS_LANGUAGES)
+LANGBUILTIN(__popcnt64, "ULLiULLi", "nc", ALL_MS_LANGUAGES)
LANGBUILTIN(__readfsdword, "ULiULi", "n", ALL_MS_LANGUAGES)
LANGBUILTIN(__va_start, "vc**.", "nt", ALL_MS_LANGUAGES)
Index: test/CodeGen/builtins-x86.c
===================================================================
--- test/CodeGen/builtins-x86.c
+++ test/CodeGen/builtins-x86.c
@@ -262,7 +262,9 @@
tmp_i = __builtin_ia32_vec_ext_v2si(tmp_V2i, 0);
(void) __builtin_ia32_ldmxcsr(tmp_Ui);
+ (void) _mm_setcsr(tmp_Ui);
tmp_Ui = __builtin_ia32_stmxcsr();
+ tmp_Ui = _mm_getcsr();
(void)__builtin_ia32_fxsave(tmp_vp);
(void)__builtin_ia32_fxsave64(tmp_vp);
(void)__builtin_ia32_fxrstor(tmp_vp);
@@ -290,6 +292,7 @@
tmp_i = __builtin_ia32_cvttss2si(tmp_V4f);
tmp_i = __builtin_ia32_rdtsc();
+ tmp_i = __rdtsc();
tmp_i = __builtin_ia32_rdtscp(&tmp_Ui);
tmp_LLi = __builtin_ia32_rdpmc(tmp_i);
#ifdef USE_64
@@ -304,6 +307,7 @@
tmp_i = __builtin_ia32_pmovmskb(tmp_V8c);
(void) __builtin_ia32_movntq(tmp_V1LLip, tmp_V1LLi);
(void) __builtin_ia32_sfence();
+ (void) _mm_sfence();
tmp_V4s = __builtin_ia32_psadbw(tmp_V8c, tmp_V8c);
tmp_V4f = __builtin_ia32_rcpps(tmp_V4f);
@@ -339,8 +343,13 @@
tmp_V4i = __builtin_ia32_cvtps2dq(tmp_V4f);
tmp_V4i = __builtin_ia32_cvttps2dq(tmp_V4f);
(void) __builtin_ia32_clflush(tmp_vCp);
+ (void) _mm_clflush(tmp_vCp);
(void) __builtin_ia32_lfence();
+ (void) _mm_lfence();
(void) __builtin_ia32_mfence();
+ (void) _mm_mfence();
+ (void) __builtin_ia32_pause();
+ (void) _mm_pause();
tmp_V4s = __builtin_ia32_psllwi(tmp_V4s, tmp_i);
tmp_V2i = __builtin_ia32_pslldi(tmp_V2i, tmp_i);
tmp_V1LLi = __builtin_ia32_psllqi(tmp_V1LLi, tmp_i);
Index: test/Sema/constant-builtins-2.c
===================================================================
--- test/Sema/constant-builtins-2.c
+++ test/Sema/constant-builtins-2.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -fsyntax-only -verify %s
+// RUN: %clang_cc1 -fsyntax-only -verify %s -fms-extensions
// Math stuff
@@ -141,6 +141,17 @@
char popcount9[__builtin_popcountll(0xF0F0LL) == 8 ? 1 : -1];
char popcount10[__builtin_popcountll(~0LL) == BITSIZE(long long) ? 1 : -1];
+char popcnt1[__popcnt16(0) == 0 ? 1 : -1];
+char popcnt2[__popcnt16(0xFF) == 8 ? 1 : -1];
+char popcnt3[__popcnt16(~(short)0) == BITSIZE(short) ? 1 : -1];
+char popcnt4[__popcnt16(~0) == BITSIZE(short) ? 1 : -1];
+char popcnt5[__popcnt(0) == 0 ? 1 : -1];
+char popcnt6[__popcnt(0xF0F0) == 8 ? 1 : -1];
+char popcnt7[__popcnt(~0) == BITSIZE(int) ? 1 : -1];
+char popcnt8[__popcnt64(0LL) == 0 ? 1 : -1];
+char popcnt9[__popcnt64(0xF0F0LL) == 8 ? 1 : -1];
+char popcnt10[__popcnt64(~0LL) == BITSIZE(long long) ? 1 : -1];
+
char parity1[__builtin_parity(0) == 0 ? 1 : -1];
char parity2[__builtin_parity(0xb821) == 0 ? 1 : -1];
char parity3[__builtin_parity(0xb822) == 0 ? 1 : -1];
@@ -159,7 +170,6 @@
char ffs5[__builtin_ffs(1U << (BITSIZE(int) - 1)) == BITSIZE(int) ? 1 : -1];
char ffs6[__builtin_ffsl(0x10L) == 5 ? 1 : -1];
char ffs7[__builtin_ffsll(0x100LL) == 9 ? 1 : -1];
-#undef BITSIZE
// GCC misc stuff
@@ -171,6 +181,11 @@
int h3 = __builtin_bswap16(0x1234) == 0x3412 ? 1 : f();
int h4 = __builtin_bswap32(0x1234) == 0x34120000 ? 1 : f();
int h5 = __builtin_bswap64(0x1234) == 0x3412000000000000 ? 1 : f();
+int h6 = _byteswap_ushort(0x1234) == (0x3412 << (BITSIZE(short) - 16)) ? 1 : f();
+int h7 = _byteswap_ulong(0x1234) == (0x3412L << (BITSIZE(long) - 16)) ? 1 : f();
+int h8 = _byteswap_uint64(0x1234) == (0x3412LL << (BITSIZE(long long) - 16)) ? 1 : f();
+#undef BITSIZE
+
extern long int bi0;
extern __typeof__(__builtin_expect(0, 0)) bi0;
Index: test/Sema/constant-builtins.c
===================================================================
--- test/Sema/constant-builtins.c
+++ test/Sema/constant-builtins.c
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -fsyntax-only %s -verify -pedantic
+// RUN: %clang_cc1 -fsyntax-only %s -verify -pedantic -fms-extensions
// expected-no-diagnostics
// Math stuff
@@ -14,12 +14,17 @@
extern int f();
+#define BITSIZE(x) (sizeof(x) * 8)
int h0 = __builtin_types_compatible_p(int,float);
//int h1 = __builtin_choose_expr(1, 10, f());
//int h2 = __builtin_expect(0, 0);
int h3 = __builtin_bswap16(0x1234) == 0x3412 ? 1 : f();
int h4 = __builtin_bswap32(0x1234) == 0x34120000 ? 1 : f();
int h5 = __builtin_bswap64(0x1234) == 0x3412000000000000 ? 1 : f();
+int h6 = _byteswap_ushort(0x1234) == 0x3412 << (BITSIZE(short) - 16) ? 1 : f();
+int h7 = _byteswap_ulong(0x1234) == 0x3412L << (BITSIZE(long) - 16) ? 1 : f();
+int h8 = _byteswap_uint64(0x1234) == 0x3412LL << (BITSIZE(long long) - 16) ? 1 : f();
+#undef BITSIZE
short somefunc();
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