craig.topper added inline comments.
================ Comment at: clang/lib/CodeGen/Targets/RISCV.cpp:479 + // 2×XLEN-bit alignment and size at most 2×XLEN bits like `long long`, + // `unsigned long long` and `double` to have 4-bytes alignment. This + // behavior may be changed when RV32E/ILP32E is ratified. ---------------- 4-bytes -> 4-byte ================ Comment at: clang/test/Preprocessor/riscv-target-features.c:6 +// CHECK-NOT: __riscv_32e // CHECK-NOT: __riscv_div {{.*$}} ---------------- __riscv_64e too ================ Comment at: llvm/lib/Support/RISCVISAInfo.cpp:937 // TODO: The 'q' extension requires rv64. - // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'. ---------------- This needs to be rebased. These FIXMEs were removed. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D70401/new/ https://reviews.llvm.org/D70401 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits