================ @@ -6077,6 +6077,8 @@ defm : DUPWithTruncPats<v16i8, v4i16, v8i16, i32, DUPv16i8lane, VecIndex_x2>; defm : DUPWithTruncPats<v16i8, v2i32, v4i32, i32, DUPv16i8lane, VecIndex_x4>; defm : DUPWithTruncPats<v8i16, v2i32, v4i32, i32, DUPv8i16lane, VecIndex_x2>; +defm : DUPWithTruncPats<v4i32, v2i32, v4i32, i32, DUPv8i16lane, VecIndex_x2>; ---------------- davemgreen wrote:
There isn't really an trunc going on here, If I'm understanding what is going on. Can we add a DAG combine for ``` t38: i32 = extract_vector_elt t36, Constant:i64<0> t35: v4i32 = AArch64ISD::DUP t38 ``` We should be able to turn that into a AArch64ISD::DUPLANE, and it should be generally useful to do so I believe. https://github.com/llvm/llvm-project/pull/66068 _______________________________________________ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
