================
@@ -145,9 +163,88 @@ namespace {
.addImm(0);
if (IsAIX) {
- // The variable offset and region handle are copied in r4 and r3. The
- // copies are followed by GETtlsADDR32AIX/GETtlsADDR64AIX.
- if (!IsTLSTPRelMI) {
+ if (IsTLSLDAIXMI) {
+ // It is better to put TLSLDAIX node before LoadOffsetToc node,
+ // because LoadOffsetToc node can use clobbers r4/r5. Search for
the
+ // first paired LoadOffsetToc node within the same BB.
+ unsigned LDTocOp =
+ Is64Bit ? (IsLargeModel ? PPC::LDtocL : PPC::LDtoc)
+ : (IsLargeModel ? PPC::LWZtocL : PPC::LWZtoc);
+ MachineBasicBlock::iterator Anchor = I;
+ if (!RegInfo.use_empty(OutReg)) {
+ std::set<MachineInstr *> Uses;
+ // Collect all instructions that use OutReg
+ for (MachineOperand &MO : RegInfo.use_operands(OutReg)) {
+ if (Uses.count(MO.getParent()))
+ continue;
+ Uses.insert(MO.getParent());
+ }
+ // Find the first Add within current BB.
+ MachineBasicBlock::iterator UseIter = MBB.begin();
+ for (MachineBasicBlock::iterator AE = MBB.end(); UseIter != AE;
+ ++UseIter)
+ if (Uses.count(&*UseIter))
+ break;
+
+ if (UseIter != MBB.end()) {
+ // Get the instruction that defines the other used register
+ // operand of UseIter. The match pattern is that: UseIter has
+ // exactly one used-operand defined by LDTocOp
+ // (LDtocL/LDtoc/LWZtocL/LWZtoc).
+ MachineInstr *LoadOffsetToc = nullptr;
+ int MatchCount = 0;
+ for (MachineOperand &MO : UseIter->operands()) {
+ if (MO.isReg() && MO.isUse()) {
+ Register OffsetReg = MO.getReg();
+ if (RegInfo.hasOneDef(OffsetReg)) {
+ if (RegInfo.getOneDef(OffsetReg)
+ ->getParent()
+ ->getOpcode() == LDTocOp) {
+ LoadOffsetToc =
+ RegInfo.getOneDef(OffsetReg)->getParent();
+ ++MatchCount;
+ }
+ } else {
+ // FIXME: analyze this scenario if there is one.
+ MatchCount = 0;
+ break;
+ }
+ }
+ }
+ // Get the iterator.
+ if (MatchCount == 1 && LoadOffsetToc) {
+ Anchor = MBB.begin();
+ for (MachineBasicBlock::iterator AE = MBB.end(); Anchor !=
AE;
+ ++Anchor)
+ if (&*Anchor == LoadOffsetToc)
+ break;
+
+ if (Anchor == MBB.end())
+ Anchor = I;
+ }
+ }
+ }
+
+ // Generate instructions to load module-handle.
----------------
amy-kwan wrote:
```suggestion
// Generate instructions to load the module-handle.
```
https://github.com/llvm/llvm-project/pull/66316
_______________________________________________
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
